Mod3_F11_Solns

Mod3_F11_Solns - ECE270 T akeHomaWork for Module 3 — Due...

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Unformatted text preview: ECE270 T akeHomaWork for Module 3 — Due Wednesday, September 28 1. Introduction to Digital System Design Fall 201 l [10 pts] Write an ABEL file that realizes the following functions in a 16V8 PLD: > F(A,B,C,D,E) = A'-B-C + A°B-C'-D + A-B"C'-E + B-C-D'-E’ >(K&EQED=ACE+NDEWBWFW+BDE MODULE Probleml TITLE DECLARATIONS a,b,c,d,e pin; f,g pin istype EQUATIONS f 'com'; 'MOdule 3A Problem 1' !a&b&c # a&b&!c&d # a&!b&!c&e # b&c&!d&!e; a&c&e # !a&d&!e # !b&!c&!e # b&d&e; ECE 270 Introduction to Digital System Design Fall 2011 2. Write an ABEL file that realizes the following truth table in a 16V8 PLD: F X,Y,Z G X,Y,Z 1 MODULE Problem2 TITLE 'Module 3A Problem 2' DECLARATIONS x,y,z pin; f,g pin istype 'com'; truth_table ([x,y,z]->[f,g]) [ololo]_>[oll]; [0,0,11—>[1,0]; [oil/o]_>[1lo]; [0/1/1]_>[111]; [1IOIO]_>[0I0]; [lloll]—>[1IO]; [111/0]->[Orl]; [111/1]_>[111]; ECE 270 Introduction to Digital System Design Fall 2011 TakeHomaWork for Module 3 — Due Friday, September 30 1. [10 pts] Assume a hypothetical PLD has macrocells of the following configuration: 2 3 I 4 I 5 I 6 7 .- 8 9 10 I 11 I 12 13 I 2 3 I 4 I 5 I 6 7 .- 8 9 10 I 11 I 12 13 2 3 12 4 1 2 5 3 3 4 I 5 I 6 7 .- 8 9 10 I 11 I 12 13 2 3 I 4 I 5 6 7 ' 1 8 9 The maximum number of product terms that can be implemented by each macrocell = 4 The maximum number of literals that each product term can have = 12 The purpose of the XOR gate is to: choose OS or 1s of function (“positive polarity”/SoP or “reverse polarity”/PoS equations ) and/or make the output active high/low ECE 270 Introduction to Digital System Design Fall 2011 2. [20 pts] Demonstrate that you can implement any arbitrary 3-variable Boolean function using just a 3:8 decoder with active low outputs (specifically, a 74x138) and a single 4-input NAND gate (plus some resistors and an LED). HINT: The LED may be connected in either a sourcing or a sinking configuration. (a) Implement the function F(C,B,A) = C’A' + C'B-A . Use 1’s (smce fewer of them) ECE 270 Introduction to Digital System Design Fall 2011 TakeHomaWork for Module 3 — Due Monday, October 3 l. [20 pts] Complete the ABEL file, below, that implements a “dorm—room alarm” system using a l6V8 PLD. Your alarm should accommodate eight sensor inputs, labeled SO through S7, plus an ARM input that can be used to arm the alarm. If any sensors are asserted while the alarm is armed, the number of the highest sensor asserted will be displayed on a 7-segment common- anode LED. Note that there are a total of m (active high) inputs and e_igm (active low) outputs. In summary, the alarm should function as follows: 0 If the ARM input is negated, the ARMED output indicator should be ofl and the 7—segment LED should be blank. 0 If the ARM input is asserted but all the sensors are negated, the ARMED output indicator should be on and the 7-segment LED should be blank. 0 If the ARM input is asserted, the ARMED output indicator should be on and the highest numbered input asserted should be displayed on a common anode 7-segment LED. MODULE dormalm TITLE 'Prioritized Dorm Alarm with 7—segment Display' DECLARATIONS SO..S7 pin 2..9; " sensor inputs ARM pin 11; " ARM (enable) input !LA,!LB,!LC,!LD,!LE,!LF,!LG pin 13..19 istype 'com'; " 7-segment display outputs lARMED pin 12 istype 'com'; " ARMED output X = .X.; " short hand for don't care TRUTH_TABLE ([ARM, s7, 56, $5, s4, s3, s2, 31, SO] —> [ARMED, LA, LB, [ 0 X] 0] 1] X] X] X] X] X] X] X] ECE 270 Introduction to Digital System Design Fall 2011 2. [20 pts] Assume a hypothetical PLD has macrocells of the following configuration: F0 0 l . OE PIN D0 D1 D2 D3 I: Y . IIO PIN >. IFIIIIIIIII b oflO : C INPUT PINO Total ‘ . INPUT PIN 9 o The maximum number of product terms that can be implemented by each macrocell when F0 = O is: 3 o The purpose of the XOR gate is to; select 0’s or 1’s of function and/or control pin assertion level 0 The purpose of the demultiplexer is to: route one of the product terms to tri-state enable or OR gate 0 The purpose of the multiplexer is to; select the source of the tri-state output enable 0 The value to which Fl and F2 should be set to allow the I/O pin to be used as an input pin: F2 = 0 Fl = 1 o The value to which F3 should be set to realize the ON SET of a function with an “dive low output: —1— to route output of an AND 0 If F1 = 0 and F2 =0, then F0 must be set to: 0 Reason why: gate to the tri-state enable ECE 270 Introduction to Digital System Design Fall 2011 T akeHomaWork for Module 3 — Due Wednesday, October 5 l. [14 pts] Show how you can implement any arbitrary 3-variable Boolean function using only an 8:1 multiplexer (specifically, a 74x151), an LED, some resistors, and some DIP switches (note that a “closed” switch should be interpreted as a logic “0”, while an “open” switch should be interpreted as a logic “l”). VCC F (C , B , A) . 4 W . e O Y 5 --------- 32 -------- D, ------- 03 ------ How many different functions of three variables are there? 256 To implement the function F(C,B,A) = C’-A’ + C-(AGBBY on the circuit, above, determine which “data” switches should be closed. Circle the input switches that should be closed: D0 ® D2 D4 @ ® D7 Show your derivation in the space below: Derivation: F(C,B,A) = C'-A’ + C-(AEBB)' = C’-A' + C-(B'-A’ + B-A) = C’-A' + C-B’-A' + C-B'A HC,B,A 939596) ECE 270 Introduction to Digital System Design Fall 2011 2. [16 pts] ABEL Review Questions: (a) A0, A1, A2, A3 defined as the set ALL: ALL [AO..A3] (b) BO,B1, B2, B3, B4 used as arange: BO..B4 (0) GE used as the tri-state enable for output signals G0, G1, 62, G3: [GO..G3].OE GE (d) Write using ABEL syntax: G(W,X,Y,Z) = (XGZMWEBYY G = (X $ Z) & !(W $ Y); -or— G = (X $ Z) & (W'!$ Y); (e) Write using ABEL syntax: F(W,X,Y,Z) = W'-Z-(X + Y’) + Y-(X' + W + Z) F=!W&Z&(X#!Y)#Y&(!X#W#Z); (t) ABEL declaration that specifies input variables SA, SB, and SC are active low: !SA, !SB, !SC pin; (g) ABEL declaration that specifies variables R0, R1, R2, and R3 are active low combinational outputs: !RO. . !R3 pin istype ‘com’; (h) ABEL equation statement specifying that the tri-state enable for combinational output signals R0, R1, R2, and R3 is given by the expression A-B"C: [R0..R3].OE = A&!B&C; ...
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This note was uploaded on 02/12/2012 for the course ECE 270 taught by Professor Staff during the Spring '08 term at Purdue.

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Mod3_F11_Solns - ECE270 T akeHomaWork for Module 3 — Due...

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