thw_mod3_no2 - Introduction to Digital System Design Fall...

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ECE 270 Introduction to Digital System Design Fall 2011 TakeHomaWork for Module 3 – Due Friday, September 30 1. [10 pts] Assume a hypothetical PLD has macrocells of the following configuration : The maximum number of product terms that can be implemented by each macrocell = ____ The maximum number of literals that each product term can have = ____ The purpose of the XOR gate is to: _______________________________________________ 1 2 3 4 5 6 7 8 9 10 11 12 13 1 2 3 1 2 3 4 5 6 7 8 9 10 11 12 13 1 2 3 4 5 6 7 8 9 10 11 12 13 1 2 3 4 5 1 2 3 4 5 6 7 8 9 10 11 12 13 Name: __________________________________________ Class No: __ __ __ __ - __ Signature: ______________________________________ Score: _______ / 30 Your Class No. is the last four digits of your PUID followed by the first character of your last name.
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ECE 270
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Unformatted text preview: Introduction to Digital System Design Fall 2011 A 1 B 2 C 3 G2AN 4 G2BN 5 G1 6 Y7N 7 Y6N 9 Y5N 10 Y4N 11 Y3N 12 Y2N 13 Y1N 14 Y0N 15 VCC A 1 B 2 C 3 G2AN 4 G2BN 5 G1 6 Y7N 7 Y6N 9 Y5N 10 Y4N 11 Y3N 12 Y2N 13 Y1N 14 Y0N 15 VCC 2. [20 pts] Demonstrate that you can implement any arbitrary 3-variable Boolean function using just a 3:8 decoder with active low outputs (specifically, a 74x138) and a single 4-input NAND gate (plus some resistors and an LED). HINT : The LED may be connected in either a sourcing or a sinking configuration. (a) Implement the function F(C,B,A) = C ′ A ′ + C · B · A (b) Implement the function F(C,B,A) = C ′ · B · A ′ + B · A + C · A ′...
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