tlhw_mod1

# tlhw_mod1 - ECE 270 Introduction to Digital System Design...

This preview shows pages 1–3. Sign up to view the full content.

ECE 270 Introduction to Digital System Design Spring 2012 1 Traditional Lecture Homework Set for Module 1 Due at the Beginning of Class (4:30 pm) on Wednesday, January 25 1. [10 points] Complete the truth table, below, and draw the circuit for a 3-input NAND gate using N- and P-channel MOSFETs. A B C F L L L L L H L H L L H H H L L H L H H H L H H H Name: __________________________________________ Class No: __ __ __ __ - __ Signature: ______________________________________ Score: _______ / 100 Your Class No. is the last four digits of your PUID followed by the first character of your last name.

This preview has intentionally blurred sections. Sign up to view the full version.

View Full Document
ECE 270 Introduction to Digital System Design Spring 2012 2 2. [16 points] Assume two hypothetical logic families have the following D.C. char- acteristics: Logic Family “A” V CC = 5 V V OH = 4.4 V V OL = 0.40 V V IH = 3.60 V V IL = 1.60 V V TH = (V OH – V OL )/2 I OH = -4 mA I OL = 4 mA I IH = 0.4 μ A I IL = -0.4 μ A Logic Family “B” V CC = 5 V V OH = 3.3 V V OL = 0.30 V V IH = 2.60 V V IL = 1.60 V V TH = (V OH – V OL )/2 I OH = -400 μ A I OL = 8 mA I IH = 40 μ A I IL = -0.4 mA (a) [8 points] Calculate the following ( show work ): DCNM A B DCNM B A Practical Fanout A B Practical Fanout B A (b) [4 points] Draw the circuit and calculate the value of the current limiting
This is the end of the preview. Sign up to access the rest of the document.

## This note was uploaded on 02/12/2012 for the course ECE 270 taught by Professor Staff during the Spring '08 term at Purdue.

### Page1 / 7

tlhw_mod1 - ECE 270 Introduction to Digital System Design...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document
Ask a homework question - tutors are online