L6_retiming - YORK UNIVERSITY CSE4210 Chapter 3 Pipelining and parallel Processing CSE4210 Winter 2012 Mokhtar Aboelaze YORK UNIVERSITY CSE4210

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1 YORK UNIVERSITY CSE4210 Chapter 3 Pipelining and parallel Processing Mokhtar Aboelaze CSE4210 Winter 2012 YORK UNIVERSITY CSE4210 Introduction • Retiming is a transformation technique that is used to change the locations of delay elements in a circuit without changing its functionality. • Can be used to reduce the number of registers, or the clock cycle • Could be considered as a generalization of the pipelining technique studies earlier
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2 YORK UNIVERSITY CSE4210 Introduction 5D 3D D 3D 2D x(n) y(n) b a D D 2D x(n) y(n) b a D D 2D D (1) (1) (1) (1) (2) (2) (2) (2) y(n)=ay(n-2) + by(n-3) +x (n) YORK UNIVERSITY CSE4210 Introduction x(n) y(n) b a D D 2D x(n) y(n) b a D D 2D D (1) (1) (1) (1) (2) (2) (2) (2) y(n)=ay(n-2) + by(n-3) +x (n) w(n)=ay(n-1)+by(n-2) y(n)=w(n-1) +x (n) w1(n)=ay(n-1) w2(n)=by(n-2) y(n)=w(n-1) +x (n) Critical path = 3 Critical path = 2
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3 YORK UNIVERSITY CSE4210 Definitions • Mapping G to G r • U and V are nodes, e is an edge • r(v) is a retiming value • w(e) is the weight of edge e in graph G •w r (e) is the weight of edge e in graph G r w r (e)=w(e)+r(V)-r(U) • A solution is feasible if all w r 0 YORK UNIVERSITY CSE4210 Example x(n) y(n) b a D D 2D (1) (1) (2) (2) x(n) y(n) b a D D 2D D (1) (1) (2) (2) 1 0 1 0 ) 4 ( ) 2 ( ) 2 4 ( ) 2 4 ( 1 0 1 0 ) 3 ( ) 2 ( ) 2 3 ( ) 2 3 ( 1 ) 2 ( 0 ) 4 ( ) 3 ( ) 1 ( = + = + ⎯→ = ⎯→ = + = + ⎯→ = ⎯→ = = = = r r w w r r w w r r r r e e r e e r 1 2 4 3
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4 YORK UNIVERSITY CSE4210 Definitions and Properties • The weight of a retimed Path ) 0 ( ) ( ) ( ) 0 ( ) ( ) ( ) ( ) ( ) 1 ( ) ( ) ( ) 2 ( ) 3 ( ) ( ) 1 ( ) 2 ( ) ( ) ( ) ( ) ( 1 3 2 2 1 1 3 2 2 1 1 3 2 2 1 3 2 1 r k r p w p r k r V V w V V w V V w p k r k r V V w r r V V w r r V V w p V V w V V w V V w p V V V V p
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This note was uploaded on 02/13/2012 for the course CSE 4111 taught by Professor Edmonds during the Winter '12 term at York University.

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L6_retiming - YORK UNIVERSITY CSE4210 Chapter 3 Pipelining and parallel Processing CSE4210 Winter 2012 Mokhtar Aboelaze YORK UNIVERSITY CSE4210

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