265Week10

265Week10 - Computer Architecture I: Digital Design Dr....

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Computer Architecture I: Digital Design Dr. Robert D. Kent Computer Architecture Basic Computer Organization & Design
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Review We introduced registers We discussed the kinds of Transfer, Arithmetic, Logic and Shift Microoperations Introduced a language that connects SSI to MSI Combined groups of instructions using multi-selection circuits We discussed general aspects of CPU, Memory and Bus architectures
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Considering the next problem in design A computer organization involves combining everything we have learned to date into a single integrated unit What is a computer? Von Neuman refers to a computer as a “stored program digital computer” What is a program? What is an instruction? How are instructions executed?
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Goals We conclude our lecture series by considering computer organization Combining the CPU, Memory and Bus architectures We introduce the concept of an instruction Instruction design and architecture Microoperation sequencing (timing, control) Roles of different registers
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Computer – High Level View CPU, Memory and Bus architectures with interface to I/O. Inpu t Outp ut Control Unit (CU) Arithmetic and Logic Unit (ALU) CP U Volatile Memory (RAM) M[0] M[1] M[K] M[L-1] CL K Address Bus Contr ol Bus Data Bus I/O Bus Mano defines Memory as 4096 words. This requires an Address bus of 12 bits to act as selection inputs to address/data multiplexers. The fundamental unit of addressable memory is the word. Each word is 16 bits long. The Data bus carries exactly 1 word of data between Memory and CPU. Input and Output is defined using the ASCII code of length 8 bits.
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The Mano model of the CPU Registers CPU registers used in the textbook (Mano), categorized by length: PC :: Program counter (address – 12 bits) AR :: Address register (address – 12 bits) IR :: Instruction register (data – 16 bits) DR :: Data register (data – 16 bits) AC :: Accumulator (data – 16 bits) INR :: Input buffer register (ASCII data – 8 bits) OUTR :: Output buffer register (ASCII data – 8 bits) SCR :: Sequence counter register (to be determined) E, R :: Single bit flip-flops (flag/utility, interrupt)
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CPU Register Lengths The register lengths (number of flip-flops to store bits) are determined by number of memory locations (address space) and the bus width (in bits) that determines the number of bits transferred between Memory and CPU, or between I/O channels and CPU. PC AR DR IR AC INR OUTR SCR 12 bits 16 bits 8 bits 4 bits 1 bit E R
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Stored programs A stored program is a set of instructions and data expressed in binary language, stored in non-volatile (ie. disk storage) memory
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This note was uploaded on 02/09/2012 for the course CSCI 504 taught by Professor Jon during the Spring '11 term at IUP.

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265Week10 - Computer Architecture I: Digital Design Dr....

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