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CH12_Problems

# CH12_Problems - Problems 9 I n a small-signal m idband...

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9. In a small-sig nal midband analysis, a FET can be modeled by the equivalent circuit s hown in Fig ure 12.20 on pa ge 590. 10. Trans conductance of a FET is defined as B iD gm = aves Q point 11. Small-signal drain resistance of a FET is defined as 1 B iD r d 3VDS Q point 12. In small-signal midband analysis of FET ampli- fier s, the coupling capacitors, bypass capacitors, and de voltage sources are replaced by short cir- cuits. The FET is replaced with its small-sig nal equivalent circuit. Then, we write circuit equa- tions and deri ve useful expressions for gains, input impedance , and output impedance. Problems Section 12.1: NMOS and PMOS Transistors Pll.1. Sketch the physical structure of an n- channel enhancement MOSFET. Label the channel len g th L , the width W , the ter- minals, and the channel region. Draw the corresponding circuit symbol. P12.2. Give the equations for th e drain curr e nt and the rang es of vcs , VDS , and VGD in term s of the threshold voltage Vt o for each region (cutoff, saturation , and triode) of an n-channel MOSFET. *Pll.3. A certain NMOS transistor ha s V co = 1 V, KP = 50 J.LAN 2 , L = 5 J.Lm, and W = 50 J.Lm. For each set of voltages, state the region of op e ration and comput e the drain current. a. vc s = 4 V and VDS = 10 V; b. V GS = 4 V and v DS = 2 V; c. v GS = 0 V and VD S = 10 V. * Pll.4. Suppose that we have an NMOS transis- tor with KP = 50 J.LA/V 2 , V to = 1 V, L = 10 J.Lm, and W = 200 J.Lm. Sketch the Problems 607 13. To find the output resistance of an amplifier, we disconnect the load , replace the signal source by its internal re sistance, and then find the resistance lookin g into the output terminals. 14. The common- s ource amplifier is inverting and can have voltag e- gain magnitude larger than unity. 15. Unbypassed impedance between the FET source terminal and ground strongly reduces the gain of a common-source amplifier. 16. The source follower has voltage gain slightly less than unit y, high current gain, and relatively low output imp edance. It is noninverting. 17. Complex digital systems can be constructed by interconnecting millions of NMOS and PMOS tran sistors, all of which are fabricated on a single chip by a relatively small number of proce ssing s tep s. drain characteristics for v DS ranging from 0 to 10 V and vcs = 0, 1, 2, 3, and 4 V. Pll.S. We have ann-channel enhancement MOS- FET with V co = 1 V and K = 0.1 mA/V 2 . Given that v cs = 4 V, for what range of v DS is the device in the saturation region? In th e triode region? Plot iD versus vcs for op e ration in the s aturation region. P12.6. Suppo se we have an NMOS tran sis tor that has V co = 1 V. What is the region of opera- tion (linear, saturation, or cutoff) if a. v cs = 5V and VDS = 10V; b. VGS = 3 V and VD S = 1 V;c. VGS = 3 Vand VDS = 6V ;d. VGS = OV and VD S = 5V?

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CH12_Problems - Problems 9 I n a small-signal m idband...

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