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CSE 2300W: Lab 3 – Overflow
Section Number: ____________
Name: Shayan Rizvi
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View Full DocumentObjectives
The objective of this lab is to detect overflow in the addition of two’s compliment
numbers.
Sometimes when one adds together two two’s compliment binary numbers
there is an overflow of bits.
There are two rules to check if there is an overflow of bits.
In this lab both rules will be implemented and verified.
This lab contained a hardware
and software component.
The digital circuit will be built in LogicWorks and then the
physical circuit will be built on the protoboard.
Background
An overflow is present in the two’s compliment binary addition when there is an excess
of bits, in other words when there is one more bit than necessary.
For example if you
add two eight bit binary numbers and the result is a 9 bit binary number than there is an
overflow of one bit.
To check overflow two rules are utilized as stated earlier.
Rule one
says that there is an overflow if and only if the incoming carry bit of the leftmost place is
not the same as the carry generated at the place.
Rule two states there is an overflow if
and only if tow addends sign are the same but the sign of the sum is different.
This lab
implemented these two rules and verified these two rules.
Specifications
There was both digital and physical hardware used in this lab.
The physical hardware
used was two exclusive OR gates and the part was called 74LS86. There was one dual
four input AND gate used and it was of the type 74LS21.
Also there was one quad two
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 Fall '11
 SteveChu

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