Pout3_AP2

# Pout3_AP2 - ; ; Outcome 3 Primary Assessment - Analysis...

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; ; Outcome 3 Primary Assessment - Analysis Problem 2 (AP2) ; ;*********************************************************************** ; ; For this problem you are to: ; ; (a) Calculate the period with which the LED on PT0 (TIM Ch 0) "blinks" ; ; (b) Program PWM Ch 1 to "blink" at the same identical rate (and phase) ; as Timer Ch 0 - HINT: Will require use of 16-bit mode ; ; (c) Answer the MC questions 26-30 on the exam document ; ;*********************************************************************** ; ; 9S12C32 REGISTER MAP INITRM EQU \$0010 ; INITRM - INTERNAL RAM POSITION REGISTER INITRG EQU \$0011 ; INITRG - INTERNAL REGISTER POSITION REGISTER ; ==== CRG - Clock and Reset Generator SYNR EQU \$0034 ; CRG synthesizer register REFDV EQU \$0035 ; CRG reference divider register CRGFLG EQU \$0037 ; CRG flags register CRGINT EQU \$0038 CLKSEL EQU \$0039 ; CRG clock select register PLLCTL EQU \$003A ; CRG PLL control register RTICTL EQU \$003B COPCTL EQU \$003C ; ==== TIM - Timer Module TIOS EQU \$0040 ; TIOS - TIMER INPUT CAPTURE/OUTPUT COMPARE SELECT TSCR1 EQU \$0046 ; TSCR1 - TIMER SYSTEM CONTROL REGISTER 1 TSCR2 EQU \$004D ; TSCR2 - TIMER SYSTEM CONTROL REGISTER 2 TCTL1 EQU \$0048 ; TCTL1 - TIMER CONTROL REGISTER 1 TCTL2 EQU \$0049 ; TCTL2 - TIMER CONTROL REGISTER 3 TCTL3 EQU \$004A ; TCTL3 - TIMER CONTROL REGISTER 3 TCTL4 EQU \$004B ; TCTL4 - TIMER CONTROL REGISTER 3 TC0 EQU \$0051 ; TC0 - TIMER INPUT CAPTURE/OUTPUT COMPARE ; ==== IMPORTANT -- Routing register for Port T (selects TIM vs PWM mapping) MODRR EQU \$0247 ; Port T module routing register ; NOTE: Used to select TIM or PWM mapping to Port T pins

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## Pout3_AP2 - ; ; Outcome 3 Primary Assessment - Analysis...

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