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Lab4_manual - Although there are two slightly different...

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EEL 4747C MicroComputers II Experiment Four: 1-bit ALU Objectives: 1. Build 1-bit ALU based on knowledge from full adders. 2. Prepare for an 8-bit ALU. Instructions: Be familiar with ALU in figure 5.10 and make a few modifications to those figures for our lab today. Each level is built using one or more schematic symbols from the previous level. You will also draw the schematics for the different levels in this order. 1. Full Adder (copied from Lab 2) 2. 1-bit ALU 3. 8-bit ALU (with zero-detection logic) In addition to the full adder, draw the 2-to-1 and 4-to-1 multiplexers shown in the figure, using the symbols named M2_1 and M4_1E under the category Mux. Note that M4_1E has an enable input, which is not needed for your 1-bit ALU, since this multiplexer should always be enabled. Wire the enable input to high by attaching a VCC component to it. VCC can be found in the Library under the category General. You may find the GND component in the library to be useful later as a source of logic 0.
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Unformatted text preview: Although there are two slightly different 1-bit ALUs pictured in Figure B.5.10, you actually only need to build one, since we will not be using overflow detection. Your 1-bit ALU should be like the one in the top of the figure, except with a SET output added as in the bottom of the figure. Note that the OPERATION input is two bits wide, which requires the use of a bus. Create the OPERATION bus as you learned in Lab 3. The separate bits of the OPERATION signal need to be wired to the selector inputs (S0 and S1) of your 4-to-1 multiplexer (M4_1E). Also remember to name the individual wires of the bus to be OPERATION (0) and OPERATION (1). When you have completed the schematic for your 1-bit ALU, make it into a symbol called ALU_1 for use in the next level of your design. As far as your report is concerning, comprehensively analyze the features of the 1-bit ALU and achieve at least 4 kinds of features in simulation....
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