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Unformatted text preview: EE 3221
Electronics II Laboratory Suhas Patel
Evan Trapani (Partner)
437934360
June 28, 2004
Lab 5 (Experiment 14) Characterization and Design of an
A C VariableGain Amplifier EE 3221 Suhas Patel June 28, 2004 Objective: To design and study the performance of a typical singlestage ampliﬁer, with
particular attention to a stable dc operating point and a desired ac gain. Circuit Diagrams: Italicized Questions: 1.) What values did you choose? _)
V+=15V R. = 1k potentiometer t
v— = 1.45 V What is the dc voltage at the base? 9 2.5 mV. And how is it determined? 9 With no input, we attached the voltmeter at the base to measure the voltage.
Theoretically, the voltage at the base can be determined by first finding the
emitter current, which is approximately equal to the collector current. Then using
the IR drop across the emitter resistor and the forward voltage of the pn junction,
we can find the voltage at the base. If the value of Beta is known, one can use the
collector current to calculate the base current and then determine the voltage at
the base by computing the IR drop across the base resistor. 9 We biased our transistor such that our collector current was 0.75 mA, which is
approximately also the emitter current. This current causes the emitter to be at
approximately ~ — 0.7 V. Assuming the forward voltage across the pn junction
to be 0.7V, the base would be at about 0 V potential, which is comparable to our
measured voltage of 2.5 mV. What value did you choose for the capacitor? 9 1 UP. What is its impedance? —> 12c; = 1 /(2ﬁ*10000*10’6) = 15.9 Ohms. 2.) What is the value of R1
9 982 Ohms, which is a little less than the expected value of lk. Explain any difference from your measured value.
9 10 = Gain =  Rc / Re. This would mean that our Re or R1 should be lk. Our measured R1 was 982 ohms, which is very close to lk. The difference is due to a couple of reasons. First, the formula we used to determine the value of R1 that would yield a gain of —10 is an approximation of the small /
signal model, according to which the Gain = — (BRc) / (Re*(B + 1)); I/
therefore, our measured resistance for R1 should indeed be less than the M one indicated by the approximation formula. Secondly, the capacitor doesn’t
0D completely short out R2. Although relatively negligible, we have to take into »' account the equivalent impedance of the capacitor in parallel with R2. Since this
J equivalent is actually nonzero, R1 is slightly less than lk. 3.) At what frequency below l0 kHz does the gain fall from —10 to —7? —> 81 Hz. 9w 1 47 P
If necessary choose a new value for C; what is your new value for C?
9 2 uF. Estimate it theoretically from your measurement ole.
9 f=1/(2n*982*2 x106): 81 Hz. 4.) Redesign the circuit in ﬁgure 1 so that it has a gain of 2, by replacing the potentiometer
with a ﬁxed resistor and removing the capacitor. .9
V+ =l0V 1111: = a: T Elli: 4.71:.
l
' V— = What is the new dc collector voltage?
9 4.70 V, which is approximately half the positive supply voltage. 5.) What is the value of RL? W @ 9 10k, same as Re.
What is the value of your Cc?
9 0.47 uF. The 3 dB point is at 15 Hz, which is less than 100 Hz as the design required it to be. PSPSCE
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This note was uploaded on 02/21/2012 for the course EE 3232 taught by Professor Feldman during the Fall '10 term at LSU.
 Fall '10
 Feldman

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