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Unformatted text preview: Power Consumption P peak , peak power is important for supply line sizing P peak = i peak V supply = max[P(+)] P av = 1/T T dt t P ) ( = T Vsupply T i t supply(t)d P(t) : instantaneous power Power consumption : dynamic ( charging up caps during transition) static ( true CMOS has no static consumption) MOS 10pA leakage, 1M trans static current 10mA dynamic power consumption switching frequency 1.5A @1.8GHz 4W power consumption related to propagation delay power delay product : PDP = t p x P av PDP measured by ring oscillator CMOS Technology Smaller feature size : density switching speed for the same of dynamic power V DD power decrease leakage static power cost/cm2 (cost of mask) 0.13 $1M/step cost/transistor complexity CMOS Process New Processes use epi-layer IBM 90nm trans. SOI substrate f T , f max > 200GHz Silk layer ( Dow chemical ) 8-level of metallization 2 of them are Cu ( Copper interconnect ) 0.6V supply ( digital ) 0.9V supply ( analog ) Short channel effects Si-wafer...
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This note was uploaded on 02/19/2012 for the course ECE 456 taught by Professor Mohammadi during the Spring '09 term at Purdue University-West Lafayette.
- Spring '09