hw4_soln - University of Pittsburgh Department of...

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University of Pittsburgh Department of Electrical and Computer Engineering ECE/CoE 0132 Fall 2005 Homework Assignment #4 1. Brown & Vranesic 2.37. 2.37 Implement the function in Fig. 2.26 using only NAND gates. Note that Fig. 2.27.a implements the function in minimum SOP form; so assuming Fig 2.27.a is correct: x 1 x 2 x 3 f Section 2.7 and Fig. 2.22 detail implementation of an SOP using NAND gates.
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2.38 Implement the function in Fig. 2.26 using only NOR gates. Note that Fig. 2.27.b implements the function in minimum POS form; so assuming Fig 2.27.b is correct: x 1 x 2 x 3 f Section 2.7 and Fig. 2.23 detail the implementation of an POS using NOR gates.
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2.43 Repeat 2.41 using NOR gates. () ( ) ( ) 123 , , 1,3, 4,6,7 0, 2,5 fxxx m f M =→ = ( ) ( ) 123123123 13123 f xxxxxxxxx xxxxx = + ++ + = + f 1 x 2 x 3 x
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4. Brown & Vranesic 3.2.a. 3.2.a Show that that circuit which outputs is functionally equivalent to the one which output in the previous problem. g f 23 3 33 1 Assuming the mux inputs are ordered 0, 1 on the left side of each; we have selecting between & with the upper multiplexer and it is choosing between & with the lower one.
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hw4_soln - University of Pittsburgh Department of...

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