L9 - Mealy and Moore Machines ECE 152A Fall 2006 Reading...

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1 Mealy and Moore Machines ECE 152A – Fall 2006 November 7, 2006 ECE 152A - Digital Design Principles 2 Reading Assignment Brown and Vranesic 8 Synchronous Sequential Circuits 8.3 Mealy State Model
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2 November 7, 2006 ECE 152A - Digital Design Principles 3 Reading Assignment Roth 13 Analysis of Clocked Sequential Circuits 13.1 A Sequential Parity Checker 13.2 Analysis by Signal Tracing and Timing Charts 13.3 State Tables and Graphs 13.4 General Models for Sequential Circuits November 7, 2006 ECE 152A - Digital Design Principles 4 Finite State Machines Thus far, sequential circuit (counter and register) outputs limited to state variables In general, sequential circuits (or Finite State Machines, FSM’s) have outputs in addition to the state variables For example, vending machine controllers generate output signals to dispense product, provide change, illuminate displays, etc.
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3 November 7, 2006 ECE 152A - Digital Design Principles 5 Finite State Machines Two types (or models) of sequential circuits (or finite state machines) Mealy machine Output is function of present state and present input Moore machine Output is function of present state only Analysis first, then proceed to the design of general finite state machines November 7, 2006 ECE 152A - Digital Design Principles 6 Analysis by Signal Tracing and Timing Diagrams Timing Analysis Determine flip-flop input equations Determine output equations Mealy or Moore model Generate timing diagram illustrating circuit’s response to a particular input sequence Outputs as well as to state
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4 November 7, 2006 ECE 152A - Digital Design Principles 7 Moore Network Example Implemented with falling edge triggered (by way of external inverter) JK flip-flops Schematic (following slide) J A = x K A = xB’ J B = x K B = x XOR A’ = xA + x’A’ z = B (function of present state only) November 7, 2006 ECE 152A - Digital Design Principles 8 Moore Network Example Schematic
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