L11 - 1 RAM & ROM Based Digital Design ECE 152A...

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Unformatted text preview: 1 RAM & ROM Based Digital Design ECE 152A Fall 2006 November 14, 2006 ECE 152A - Digital Design Principles 2 Reading Assignment Brown and Vranesic 10 Digital System Design 10.1 Building Block Circuits 10.1.3 Static Random Access Memory (SRAM) 10.1.4 SRAM Blocks in PLDs 2 November 14, 2006 ECE 152A - Digital Design Principles 3 Reading Assignment Roth 9 Multiplexers, Decoders, and Programmable Logic Devices 9.5 Read Only Memories November 14, 2006 ECE 152A - Digital Design Principles 4 Read/Write Memories RAM Random Access Memory Same access time to all memory locations As opposed to serial access memory About the same time for read and write SRAM Static Random Access Memory Built with cross coupled inverters and pass transistors 3 November 14, 2006 ECE 152A - Digital Design Principles 5 Read/Write Memories 6T SRAM Cell CMOS implementation with pass transistors Sense amp at bottom of column November 14, 2006 ECE 152A - Digital Design Principles 6 Read/Write Memories RAM Blocks and Register Files 4 November 14, 2006 ECE 152A - Digital Design Principles 7 Read/Write Memories RAM (cont) DRAM Uses capacitance on MOSFET gate Must be refreshed periodically Restore charge on gate capacitance Accomplished by reading or writing to memory location November 14, 2006 ECE 152A - Digital Design Principles 8 Read/Write Memories RAM (cont) Both SRAM and DRAM are volatile Data lost when power is removed DRAM has approximately 4 times the capacity of SRAM Basic memory cell of DRAM is smaller ~2 transistors vs. 6 SRAM is generally faster 5...
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L11 - 1 RAM & ROM Based Digital Design ECE 152A...

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