97上電子學一第&aum

97上電子學一第&aum

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Microelectronic Circuits I (Quiz 2) date: 2008/12/19 (Fri) time: 14:20~15:10 1. For the devices in the circuits of Fig. 1, V 1 = t V ; 0 = λ ; 0 = γ ; m 1 μ = L ; m 10 = W and 2 μA/V 50 = ox n C . Find V 2 and I 2 . How do these values change if Q 3 and Q 4 are made to have W = 100 μ m? Figure 1 2. Fig. 2 shows a discrete-circuit CS amplifier employing the classical biasing scheme. The input signal v sig is coupled to the gate through a very large capacitor (shown as infinite). The transistor source is connected to ground at signal frequencies via a very large capacitor (shown as infinite). The output voltage signal that develops at the drain is coupled to a load resistance via a very large
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Unformatted text preview: capacitor (shown as infinite). (a) If the transistor has V t = 1V and k n W/L = 2mA/V 2 , verify that the bias circuit establishes V GS = 2V, I D = 1mA, and V D = 7.5V. That is, assume these values, and verify that they are consistent with the values of the circuit components and the device parameters. (b) Find gm and ro if V A = 100V (c) Draw a complete small-signal equivalent circuit for the amplifier assuming all capacitors behave as short circuits at signal frequencies (d) Find R in , v gs /v sig , v o /v gs , and v o /v sig . Figure 2...
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This note was uploaded on 02/21/2012 for the course EE 101 taught by Professor 張捷力 during the Spring '07 term at National Taiwan University.

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97上電子學一第&aum

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