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EEE4306_Quiz_3_Solution_2009

# EEE4306_Quiz_3_Solution_2009 - EEE 4306 QUIZ III 100...

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Unformatted text preview: EEE 4306 QUIZ III, 100 Points ' " Name: A11 ‘ ' 60 Minutes. Open Note, Open Book, 7/17/09 UFID . Circuit Element Values, R5 = 200 Q, RL 2 20K Q, Cx = 00. MOS Parameters: VTN= 1 V, V“): —1 V, k = 8mA/V2 = 1/2unCox(Wn/Ln)= l/2,upCox(Wp/Lp) , K = 0.01. Assume that the NMOS (M1, M2, M3, and M4) and PMOS devices (M5 and M6) in the circuit are in saturation. VSUPPLY : 12V See Small Signal Model Below VSUPPLY = '12V A. V I lzpF V2 .8 5pﬁf —20mAN*Vy T 150KQ 20Ko T5pF Stage 2 small—signal schematic. Vy is connected to Point A and V2 is connected to Point B in the above schematic. a) Biasing Calculation: (10 points): Find Rx so that the differential pair has 4 mA bias through the NMOS current source. .2 Rx: A, lgzk(vw~\/T) Z, I L/m/l: E‘mA/VL(VZGS"9 2,. = 12 - 4W” WW 4151/: (Mass-:12)“. ,/707:Vq9"/V b) Find the midband input small signal stage gain, the Stage two gain and the overall Gain, (60 points). To Z M/'/ W; ; gym/I“an 6‘ “Lb V _ ’ f0: - @gM/i/VZMA‘ = Vin] _Vm2 =§ﬂ . 2 (qu n 120; 1: (59/37,) 2 . . - . V . VOW] 1:, ~;,) Vﬂialdll/l 30kt // [535]?) gm : re a 0 4/“ ASmgeZ Z—VA— : a L/g Z “w I 4470 c) DRAW a Cc = 20 pF on the circuit that gives the best (highest level) of compensation to the op amp. (5 Points) (1) Using the circuit in part c) Show why or why not that this circuit has a 45 degree phase margin (20 points). ML; -20,” A/Uz a)? _ 72; .-.- mka salt/#2 I gmz 91C; [2, CF :ZafF‘+2pF (PM 1" ZZPF _ v—ZéDM 4/92 [a k— — 22,0 F « ‘fﬁéJL R, _ («lgO-kQ/[lgam/lﬁsﬁg :- 5050 w/S 20?” [aéﬂ/ﬁoke 3 5/575). _ 91mg; : “W ﬂ ‘ 5:62 +Q<Ci+€z> (57'F>@9*@ZPF>CWFJ :. [AM/0'7 9/W U0 g MP2. #{UZ’N “all M 476" Mm}: e) Does the circuit Gain Bandwidth Produce increase or decrease if there is double the supply voltage and why? (5 points). f0 ,2: 7-7V/ps x m re 37% ,. am pm My,“ m, an, 59%- GMM; :. gm - M = 7/2 307740 ~ ‘/+ xEB‘wﬂ/V'Ze-o' . 14579721,“: GM, 2,9215 "i" Mﬁph \$1751, \ ~07‘61 snag; ¢ ' 'f = fay ("F7144 MJL ...
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