EEE4306_Quiz_3_Solution_2010_Summer

EEE4306_Quiz_3_Solution_2010_Summer - 100 Points 7/13/10...

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Unformatted text preview: 100 Points 7/13/10 EEE 4306 QUIZ 1H, 60 Minutes. Open Note, Open Book, Name: ‘ UFID . Circuit Element Values, RE = 100 Q, R5 = 1000 Q, REE = 100K 9, RL = 50K Q, CA = 6 pF, C3 = 6 pF, CX = ooF, Cs = 00F. Assume CA and CB represent all the capacitance from the transistors at those nodes. BJT Parameters: B = 120, VA = 120V, BJT base-emitter VBEON E 0.7V Assume and BJT devices (Q1, Q2, Q3, Q4, Q5, Q6, and Q7) are in linear active. MOS Parameters: VTN= 1 V, VTp= -l V, k = 8mA/V2 = 1/2unCox(Wn/Ln), and, 9» = 0.025. Assume that the NMOS (M3, M4, M5, and M6) are in saturation with Vbias6 set properly. Also, assume that ID is set to be the same as the current set by the bias circuit in the source of M5. VSUPPLY = '20V a) Biasing Calculations: (5 points): Find Rx so that the differential pair has 2 mA bias through the BI T current source, Q8. 1:: 3"” : 3 z 2&00. [y‘XmA/VZ‘ I ZI— f/W’fl’ J2 . _ = 5.2,» raw, an}: '5'; a #315,, = muff/V b) Fmd the mldband Stage 1 small s1gnal stage gam, the Stage two gam and the overall Gain, (70 points). fl A (3/14,: .2, cm», 4/n/ V / I r-LjMKL—Z fH/ymA/v «Md/L AStagele =6M ‘ » . in] m2 ’ /_ " 5741 aux/u 1 57/90. am $36 [L/7Z [202’ = ’22. {I "L 9”” N075.> V - , = Va [35. AStageZ =—I;g:+6fl4 ‘ Z. (éo . _ . v — //,, alt/Mr gZ/VAQ. ,2; W7 Q6 1 “ 55/5 "’7" (“420 fpo+390&) 5 555 i: /7__ V0 y F _ AW’“”=V,,,1—Kn2= flfiw’ 45/”; Q», : ML ("Wm 2/2/72‘6356) 7 : ___.’——’/ «i W 1' \jz ’(jzgfiflflflv \ g V 1+ / ’3 .. '5 0“ M7+Me 11Lva 6: Gvcw/ IQ / {/90 _> f r ’ FF __ . I t 456} 3 19% Barf #6745 1;; 9J5; ' ‘1'56‘ 3404‘ 4Z8? 53‘ka IL I _ _ 243 «L VALE? ; 7;” ‘ :: fl?" kg. 6‘ — a“ _ ' M v r “y _. [—d L M5 "/ k1; ' y'XM/A/Z’L/‘Mfl ~_—_ //, é/MA/l/ z ___ ' I 9%; figgl/Qaél/g’ R" : (A; +571»; ’3) , fl ’ 5' g/M’A VIC/Ma "/akf) - l' m*/”/. 7 ~“’ (NJ/fl /~/< : gay/3,7, 92$ng /' ’ 0 A 19K / 7 = /,/V/, flzfifl/p fog: LV— =- aye/2, (029' 7:44 A‘ c) DRAW a Cc = 20 pF on the circuit that gives the best (highest level) of compensation to the op amp. (5 Points) 5:. 90.311 d) Using the circuit in part c) Show why or why not the circuit phase margin is > 45 degree (15 points). e) What is the Slew rate of this circuit? (5 points). "PM E70; 224.042 2M : 2 Zfi'tloy" ' (36/ Map _, @y 4 I A , - . As M w , I). ’ 9mg 0?, CC 2; mMAL/u' [Wk/L’Zflp/WZ/m g/MJMM we = 352:: .. 532m 74/2 I 08‘ -:>'7’xl f: if)”. M— 2. C1 C2 +C¢CC +9) 6-? F15}, F +, Zap FCZ/ 7%):ch "1' ,l. gamma/2:5. 7; ’ ’5 27éXZ/9'M {at 32 @gg 2: 7— XKZX/DY RLZKLEQL: gz'cf/(JL we, (My; M ‘ , /€ .— C or per/5 90%»e CHM LL r ékr/Cg“; P W4. 1) Bonus: Which input of Vial and VM is the negative input to the circuit as compared to V0? What is the gain of the circuit if a small signal voltage source with a series resistance of 8K 9 is attached to Vim and Vin; is grounded? (5 points). vim» ismwaflw mpLJZ. AS=E= 63m A W”;30’<Jl ,fiflmz qzékp. V f 9 S 035mm (gt-:Dj'wfil 297/ch @lv’l 3: + [ea 2 2 2, [204’iiifk2fl , law} "2 30km an $4)» Work Page ...
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This note was uploaded on 02/23/2012 for the course EEE 4306 taught by Professor Eisenstadt during the Fall '08 term at University of Florida.

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EEE4306_Quiz_3_Solution_2010_Summer - 100 Points 7/13/10...

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