8086_2 - 8086-Architecture Functional and Internal block...

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8086 1 8086-Architecture Functional and Internal block schematic of 8086 Features of 8086 Register organization of 8086 Memory organization of 8086
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8086 2 S Y S T E M B U S Timing Central processing unit Bus Control logic Memory module Memory Module Interface Mass Storage device Interface I/O device Interface Interface I/O subsystem Memory Architecture of an typical microprocessor based system
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8086 3 Typical Microprocessor based system A typical microprocessor based system consists of CPU (central Processing Unit) (ALU + Register organization + Control unit) Timing unit Bus control logic Memory I/O subsystem
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8086 4 Features of 8086 Introduced in 1978 . Comes in Dual-In-Line Package(DIP) IC. 8086 1s a 16-bit N-channel HMOS microprocessor . Works on 5 volts power supply and draws a current of 360 ma, with an internal circuitry made up of 29K transistors. It consists of an electronic circuitry built using 29000 transistors. It is built on single semiconductor chip and packaged in an 40-pin IC. It has 20-bit address bus and 16-bit data bus. It can directly address upto 2 20 I.e., 1M bytes of memory. The 16-bit data word is divided into lower-order byte and higher order byte.
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8086 5 Features of 8086 The 20-bit address bus is time multiplexed: The lower order 16-bit address bus is time multiplexed with data bus. The higher order 4-bit address bus is time multiplexed with status signals. The maximum internal clock for 8086 is 5MHz. 8086 chip does not have the facility of internal clock generation. (the INTEL 8284 clock generator/driver is used to generate the clock signal for 8086 microprocessor The clock signal is divided by 3 in case of 8086 for internal clock requirements.
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8086 6 Features of 8086 8086 uses I/O mapped I/O techniques hence I/O devices are accessed by using separate 16-bit address 8086 operates in two different modes Minimum mode ( It works as a simple single processor system when configured in minimum mode) Maximum mode ( It works as a multiprocessor system i.e., along with math coprocessor and I/O coprocessor when configured in maximum mode)
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8086 7 Control & Timing Data pointer & Index registers ALU FLAGS Segment registers & Instruction pointer Bus Interface Unit Instruction Queue 2 ____ BHE A 16 /S 3 to A 19 /S 6 AD 0 to AD 15 _____ INTA __ RD __ WR _ DT/R ___ DEN ALE _____ TEST INTR NMI __ RQ/GT LOCK QS 0 QS 1 __ S 1 __ S 3 __ S 2 Vcc ___ MN/MX READY RESET CLK HLDA HOLD GND Relocation Register file Execution Unit BUS interface unit
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8086 8 AH AL BH BL CH CL DL DH Stack Pointer Base Pointer Destination Index Source Index Operands FLAGS Instruction Pointer DS Register SS Register CS Register ES Register 6 5 4 3 2 1 Control System Memory Interface ALU EU BIU DX CX AX BX Instruction Queue INTERNAL BLOCK DIAGRAM
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8086 9 8086 Architecture Architecture of 8086 is pipeline type of architecture.
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