07-code

07-code - Instruction selection Simple approach:...

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Instruction selection Simple approach : Macro-expand each IR tuple/subtree into machine instructions Expanding tuples/subtrees independently poor quality code Sometimes mapping is many-to-one “Maximal munch”: works reasonably well with RISC Other approaches : Model target machine state as IR is expanded ( interpretive code generation ) Copyright c ± 2007 by Antony L. Hosking. Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for proFt or commercial advantage and that copies bear this notice and full citation on the Frst page. To copy otherwise, to republish, to post on servers, or to redistribute to lists, requires prior speciFc permission and/or fee. Request permission to publish from hosking@cs.purdue.edu. CS502 Instruction selection 1 Register and temporary management Temporaries hold data values relevant to current computation: Usually registers May be in-memory storage temporaries in local stack frame Register allocation : assign registers to temporaries Limited number of hard registers some temporaries may need to be allocated to storage assume a pseudo-register for each temporary register allocator chooses temporaries to spill allocator generates corresponding mapping allocator inserts code to spill/restore pseudo-registers to/from storage as necessary We will deal with register allocation after instruction selection CS502 Instruction selection 2 Tree patterns Express each machine instruction as fragment of IR tree: a
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07-code - Instruction selection Simple approach:...

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