CompE270FinaExamSp10

CompE270FinaExamSp10 - CompE 270 Digital Systems Sp10...

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CompE 270 Digital Systems Sp10 NAME:____________________ Final Exam - use additional sheets if needed -- SHOW WORK for partial credit 1 1) Add the 8-bit values (show results as 8 bits : binary, hex, and decimal notation). 10 pts Add hex: convert binary to decimal FF hex binary = _____ Signed Dec + 10 hex + _______________ binary = _____ Signed Dec show results in = _______________ binary = _____ Signed Dec hexadecimal: __________ 2’s comp Result valid? Y / N_ Signed decimal: __________ unsigned Result valid? Y / N _ Carry Out: C = ___ Overflow: _____ 2) Multiply 5 10 times 4 10 in unsigned binary: 5 pts 3) Convert the following numbers: (5 pts ea) a) 4 bit 2’s comp: 11.01 b) Signed hex C0 to decimal: __________ to decimal: ________ c) Decimal -1.75 d) Decimal 127 to 4 bit 2’s comp binary: _______ to unsigned hex: ______ 4) Calculate the following using 4-bit BCD sum, and decimal equivalents: 10 pts 0 1 0 1 0 1 1 0 BCD = ________ Decimal +0 0 1 0 0 1 0 1 BCD = +________ Decimal Result __________________ BCD ________ Decimal 5) True/False 2 pts each: T/F Equation T/F Equation ___ X + 1 = X’ ___ X (XOR) 1 = X’ ___ xy + x’z + yz = xy + x’z ___ X + YZ = (X + Y)(X + Z) ___ (X’Y’Z’)’ = (X + Y + Z) 6) Circle the device that best matches the description: 2 pts ea PLA / PAL / ROM has Programmable AND array, Fixed OR array PLA / PAL / ROM has Fixed AND, programmable OR array PLA / PAL / ROM has Both Programmable AND and OR arrays PLA / PAL / ROM can implement *any* function of its inputs PLA / PAL / ROM is used for Combinational logic in an FPGA
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CompE 270 NAME:____________ ____ Final Exam CompE270FinaExamSp10.doc 2 7) The Consensus theorem states: xy + x’z + yz = xy + x’z Show the equivalence using the Karnaugh maps below AND 10 pts Indicate which has a hazard, what type, and where it is xy + x’z + yz ---------------------------------------------------------- xy + x’z 8) Is this correct:
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CompE270FinaExamSp10 - CompE 270 Digital Systems Sp10...

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