ch4hwsol - Embedded Controller Design, W00 Problem...

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Embedded Controller Design, W00 Problem Solutions 7 Solutions to Chapter 4 Problems 1. What is the maximum SRAM that will fit in a 32 pin package? If it were organized as xx K x 8 bits (byte wide memory), then the following pins must be used: 2 pins for power/ground 3 pins for /WE, /OE, /CE 8 pins for data I/O The remaining 32-2-3-8 = 19 pins are available as address lines. That means that there are 2 19 or 524,288 byte (512 K) locations each holding one byte, half a megabyte or 4 M bits total. If the memory was organized as xx K x 1 bit, then the following pins must be used: 2 pins for power/ground 3 pins for /WE, /OE, /CE 1 pin for data I/O The remaining 32-2-3-1 = 26 pins are available as address lines. That means that there are 2 26 or 67,108,864 bit (64 M) locations, or 64 M bits total. 2. What is the largest ROM that will fit in a 32 pin package? If it were organized as xx K x 8 bits (byte wide memory), then the following pins must be used: 2 pins for power/ground 2 pins for /OE, /CE 8 pins for data I/O The remaining 32-2-2-8 = 20 pins are available as address lines. That means that there are
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This note was uploaded on 02/26/2012 for the course COMPE 475 taught by Professor Staff during the Spring '08 term at San Diego State.

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ch4hwsol - Embedded Controller Design, W00 Problem...

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