ECDT1501xF01ol-1

ECDT1501xF01ol-1 - Embedded Controller Design 051x14OLxw01...

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon
Embedded Controller Design 051x14OLxw01 Name__________________ ecdt1051xf01ol.DOC 1 Mid-term Exam 3 points each for problems on this page – use additional pages for answers if necessary 1) What is an “open drain” output and what is it used for? 2) What is the difference between setup and hold time? 3) How is a Flash EPROM programmed and erased? 4) What is the value V t for 74HCTxx logic? 5) What is noise margin, and is a larger magnitude better or worse? 6) What is metastability and when does it occur? 7) Why is non-volatile memory used for embedded program storage? 8) What is asymmetrical delay, and why does it occur? 9) What is bus contention, and how does one avoid it? 10) Does a Flash EPROM incorporate RAM?
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
Embedded Controller Design 051x14OLxw01 Name__________________ ecdt1051xf01ol.DOC 2 11) What is "negative noise margin," and how can you fix it? 5 pts 12) What is "ground bounce" and why is it worse for faster ICs? 5 pts
Background image of page 2
Image of page 3
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 02/26/2012 for the course COMPE 475 taught by Professor Staff during the Spring '08 term at San Diego State.

Page1 / 4

ECDT1501xF01ol-1 - Embedded Controller Design 051x14OLxw01...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online