Compe475T2_Fa10sol

Compe475T2_Fa10sol - CompE 475 Mid-term exam #2 Part A -...

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CompE 475 Mid-term exam #2 T2xECD 041 Name:___ SOLUTIONS ____ 1 Part A - CLOSED BOOK/NOTES Definitions: (2 pts each) 1) Partial address decoding If any device is decoded in such a way that it appears more than once in the address space, then it is referred to as “partial address decoding.” This derives from the fact that not all the address signals are used to determine which device should be enabled. 2) Address access time – Taa: Valid Address to valid data delay 3) Memory mapped I/O Decoding part of the memory address space to I/O devices is referred to as memory mapped I/O. 4) Chip enable access time Tce: Chip Enable (CE) active to valid data delay (see diagram in 2) 5) Output disable time Tod: time from the output enable going inactive until the output is disabled (output enters Hi-Z state or floats). See diagram above. 6) There are two kinds of design flaw that can cause bus contention, one of them is timing related. 15 pts a) What is the other type of design flaw? b) Why is bus contention a problem? c) List two design changes, one for each type of flaw. a) Two devices responding to one or more of the same (overlapping) addresses, due to incorrect address decoding. b) Contention causes very large currents to flow between the power supply and ground when devices drive opposite levels. c) There are two practical solutions to bus contention: 1) Buy an I.C. that has a faster (shorter) output disable time Tod, or 2) Add a tri-state buffer to the data bus of the memory which has a slow output disable time, since tri- state buffers have a faster output disable time. In rare cases, slowing the clock may also work. Adding wait/stretch states won't help! Tod
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CompE 475 Mid-term exam #2 T2xECD 041 Name:___ SOLUTIONS ____ 2 7) When evaluating the timing specifications, I.C. specification sheets list the test output loading conditions under which the chip is specified to operate. (e.g. C L = xxpF) What can you do when they're exceeded? (When actual load C > C L ) 10 pts LIST TWO potential solutions: Generally, if the driver is overloaded from either an AC (C>CL) or DC (R<RL) point of view, the simplest solution is to select a driver with higher output drive current. It is also possible to parallel outputs of the same type FROM THE SAME DEVICE to get
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Compe475T2_Fa10sol - CompE 475 Mid-term exam #2 Part A -...

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