Altera_DDC_HTML - Designing Digital Down Conversion Systems...

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11/23/07 9:50 AM Designing Digital Down Conversion Systems using CIC and FIR Filters Page 1 of 3 http://www.altera.com/support/examples/dsp-builder/exm-digital-down-conv-cic-fir.html Literature Licensing Buy On-Line Download Entire Site Home | Products | Support | End Markets | Technology Center | Education & Events | Corporate | Buy On-Line Knowledge Database | Devices | Design Software | Intellectual Property | Design Examples | mySupport | Reference Designs Products MAX/MAX II Stratix/Stratix GX Nios II Functionality Arithmetic Memory Bus & I/O Logic Interfaces & Peripherals DSP Communications PLL & Clocking Design Entry Quartus II Project Tcl VHDL Verilog HDL C Code Examples DSP Builder TimeQuest Simulation Tools Mentor Graphics ModelSim Cadence NCsim Synopsys VCS Legacy Examples Graphic Editor AHDL Home > Support > Design Examples > DSP Builder > Designing Digital Down Conversion Systems using CIC and FIR Filters Print This Page E-mail This Page Designing Digital Down Conversion Systems using CIC and FIR Filters The Designing Digital Down Conversion Systems design example, featuring Altera ® CIC and FIR MegaCore ® , demonstrates a multichannel, multirate digital system using Altera's DSP MegaCore intellectual property (IP). Sample rate conversion has a wide range of applications in modern digital systems, especially wireless communications systems such as WCDMA and WiMAX systems. Efficient implementation of decimation and interpolation can be accomplished by concatenating cascaded-integrator-comb (CIC) and finite impulse response (FIR) filters. In this example we demonstrate a data rate down conversion system that can be commonly seen in time division multiplexing (TDM) WiMAX receivers. The overall system diagram is shown in Figure 1. For more
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