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Unformatted text preview: EE3755 Verilog Homework 3 Due: TBA /// Estimated time to finish: Prob.1 : 50Mins. Prob.2 : 10Min. Prob.3: 30Min. Total : 90 Mins.. When you submit the Hw., Please write down how much time did you spend for each problem. (No penalty for spending too little or too much time. Just want to know how long you spent.) How to submit: Hard copy during the class. Use script command to take a snap shot of your program. After run script Use cat command to display your program. Use ncverilog to run your program. then stop the script. Problem 1 : Rewrite or Modify the testbench program. The program should test the number of ones in a. a value varies from 0 to 15. The output format may be this following: Time, value of a at binary, value of p. ( time = 500, a = 0000 0000 0000 0000 0000 0000 0000 0000 ,p = 0; time = 1500, a = 0000 0000 0000 0000 0000 0000 0000 0001 ,p = 1; module pop_with_handshaking(p,ready,a,start,clk); input [31:0] a; input start, clk; output p, ready; reg [5:0] p; reg ready; reg [31:0] acopy; initial ready = 1; always @( posedge clk ) begin if( start ) begin acopy = a; p = 0; ready = 0; end else if( !ready && acopy ) begin p = p + acopy; acopy = acopy >> 1;...
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This note was uploaded on 02/26/2012 for the course EE 3755 taught by Professor Staff during the Fall '02 term at LSU.
- Fall '02