finalhwlast-1

finalhwlast-1 -...

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Unformatted text preview: ######################################################################## Homework #5 - (Memory Hierarchy) Name: Ajay Joshi Course: CSCE 2610 section 021 Instructor: Michael Mohler Due: 08-09-2011 ########################################################################---------------------------------------------------------------------------------------------------------------------------------- 1. (15 points - 5 points each) Describe each of these types of cache miss: a) Compulsory miss: a program references a given cache block when a misses happens for the first time. The compulsory misses take place even with an infinite cache. b) Capacity miss: this miss occurs if we load a data and replaced it with some other data. This process occurs when the cache is being unable to hold all the data because the cache was full. c) Conflict miss: These misses tend to occur because of the cache organization. It happens when we replace one block to another occupied block. These misses can be reduced with the help of a fully associative cache, and by not increasing the caches size. ------------------------------------------------------------------------------------------------------------------------------------- 2. (30 points - 10 points each) Assume you have a cache that can hold 4 blocks -- the size of the block is irrelevent for our purposes. Show the state of the cache after each of the following 15 memory accesses (block indexes): 1, 3, 5, 10, 3, 1, 8, 2, 5, 6, 8, 9, 10, 1, 2 a) In a direct mapped cache------------------------------------------------------------------------------------------------------------------ | Address | Miss Type/Hit | Block0 | Block1 | Block2 | Block3|------------------------------------------------------------------------------------------------------------------ | 1 |miss(comp) | |Mem[1] | | |------------------------------------------------------------------------------------------------------------------- | 3 |miss(comp) | | Mem[1] | |mem[3]-------------------------------------------------------------------------------------------------------------------- | 5 |miss(comp) | | Mem[5] | |mem[3] |-------------------------------------------------------------------------------------------------------------------- | 10 |miss(comp) | | Mem[5] |mem[10] |mem[3]------------------------------------------------------------------------------------------------------------------- | 3 | hit | |mem[5] |mem[10] | mem[3] |------------------------------------------------------------------------------------------------------------------- | 1 | (conf)miss | |mem[1] |mem[10] | mem[3] |------------------------------------------------------------------------------------------------------------------- | 8 |(comp)miss|mem[8] |mem[1] |mem[10] |mem[3] |------------------------------------------------------------------------------------------------------------------- | 2 |(comp)miss| mem[8] | mem[1] | mem[2] |mem[3] |-------------------------------------------------------------------------------------------------------------------...
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