Lecture90 - CSCE 2610 The Processor: ALUs and the Datapath...

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CSCE 2610 The Processor: ALUs and the Datapath
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Post Mortem Midterms: Everyone passed (Only one A without the 10 extra points) 6 A's 5 B's 3 C's Pitfalls
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Midterm
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Homeworks
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Programs
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Grades
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Recap from earlier A processor is made of the following components: Program Counter Instruction Memory Register Array ALU (Arithmetic Logic Unit) Data memory Other components (wires, multiplexors, shifters, sign-extenders, adders)
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Recap from earlier
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Recap example 1: lw $t0, 4($a0)
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Recap example 1: lw $t0, 4($a0)
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Recap example 1: lw $t0, 4($a0)
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Recap example 2: beq $t0, $t1, label
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Recap example 2: beq $t0, $t1, label
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Recap example 2: beq $t0, $t1, label
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Incomplete We're still missing a few things Full logic for branch detection Jump instructions Control Unit A few other niggly details Recall that we are assuming that we only have the following instructions to implement: Memory : lw, sw R-type : add, sub, AND, OR, slt Branching : beq, j
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Instructions Note: Diagrams will ignore “Jump” for now rt is sometimes used for read, sometimes for write.
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Adding Control (and Finished Branching)
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ALU control Recall that our ALU uses the following control signals: (1-bit) invert input A (1-bit) invert input B (2-bits) select from 4 operations: AND, OR, +, slt Altogether, the ALU requires 4 input bits to manage it.
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The 6 ALU operations we're concerned with can be represented as shown (right): ALU Control Lines Function 0000 AND 0001 OR 0010 add 0110 subtract 0111 set on < 1100 NOR These bits are produced in a special ALU control unit. Inputs to this unit are:
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This note was uploaded on 02/28/2012 for the course CSCE 3510 taught by Professor Unt during the Spring '12 term at North Texas.

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Lecture90 - CSCE 2610 The Processor: ALUs and the Datapath...

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