7-Pipelining - 8/19/2011 Pipelining Read: Chapter 4,...

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8/19/2011 1 CSc 252 — Computer Organization 7 — Pipelining 1 Pipelining Read: Chapter 4, Sections 4.5 to 4.8 (4th edition) Laundry example: washing (30 minutes), drying (30 minutes), folding (30 minutes), “stashing” (30 minutes). If only one person’s wash, it takes 2 hours to complete. If several folks need to do laundry, can do in 2 hours each — sequential solution: But, the washer, dryer, “folder”, and “stasher” are independent units. CSc 252 — Computer Organization 7 — Pipelining 2 Pipeline basics : Pipelined laundry takes 3.5 hours for four loads: Pipelining: Does not help the latency of a single task — still takes 2 hours to do one person’s laundry. Does help the throughput of the entire work load — 3.5 hours vs. 8 hours. Multiple tasks operating simultaneously, each using different resources. Potential speedup = number of pipe stages. Rate limited by slowest pipeline stage. Unbalanced lengths of pipe stages reduces speedup. Time to “fill” pipeline and time to “drain” it reduces speedup.
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8/19/2011 2 CSc 252 — Computer Organization 7 — Pipelining 3 Pipeline basics (continued): Consider the load word instruction: lw $s0, 0($t0) IFetch : Instruction Fetch: get the instruction from memory. Reg/Dec : Fetch values from Registers and Decode the instruction. Exec : Execute; calculate the memory address from which to load the word. Mem : Read the word from Memory. Write : Write the word to the Register. IFetch Reg/Dec Exec Mem Write Cycle 1 Cycle 2 Cycle 3 Cycle 4 Cycle 5 CSc 252 — Computer Organization 7 — Pipelining 4 Pipeline basics (continued): A more realistic picture: Not all cycles take the same amount of time: Memory access is slower. ALU computation is slower. Register access is faster. Figure 4.26, page 333 (4th edition): Instruction class Instruction fetch Register read ALU operation Data access Register write Total time Load word ( lw ) 200 ps 100 ps 200 ps 200 ps 100 ps 800 ps Store word ( sw ) 200 ps 100 ps 200 ps 200 ps 700 ps R-format ( add , sub , and , or , slt ) 200 ps 100 ps 200 ps 100 ps 600 ps Branch ( beq ) 200 ps 100 ps 200 ps 500 ps
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8/19/2011 3 CSc 252 — Computer Organization 7 — Pipelining 5 Pipeline basics (continued): Can improve performance by increasing the instruction throughput: 3 load word ops, 2.4 nanoseconds : Becomes 3 load word ops, 1.4 nanoseconds: Clock cycle time dependent on the slowest phases: 200 picoseconds in this case. Instruction fetch Reg. ALU Data access Reg. lw $s1,100($t0)
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This note was uploaded on 02/28/2012 for the course CSC 252 taught by Professor Moon during the Fall '11 term at University of Arizona- Tucson.

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7-Pipelining - 8/19/2011 Pipelining Read: Chapter 4,...

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