chapter5-datapath01_from_Li-shiminmatomacbook-pro_

chapter5-datapath01_from_Li-shiminmatomacbook-pro_ -...

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Unformatted text preview: Digital IC Introduction Digital Integrated Circuits A Design Perspective Chapter 5 Arithmetic Circuits 1 Digital IC A Generic Digital Processor 2 MEMORY DATAPATH CONTROL INPUT-OUTPUT Digital IC Building Blocks for Digital Architectures • Arithmetic unit • Bit-sliced datapath (adder, multiplier, shifter, comparator, etc.) • Memory • RAM, ROM, Buffers, Shift registers • Control • Finite state machine (PLA, random logic.) • Counters • Interconnect • Switches\Arbiters\ Bus 3 Digital IC An Intel Microprocessor 4 9-1 Mux 9-1 Mux 5-1 Mux 2-1 Mux ck1 CARRYGEN SUMGEN + LU 1000um b s0 s1 g64 sum sumb LU : Logical Unit SUMSEL a to Cache node1 REG Itanium has 6 integer execution units like this Digital IC Bit-Sliced Design 5 Bit 3 Bit 2 Bit 1 Bit 0 Register Adder Shifter Multiplexer Control Data-In Data-Out Tile identical processing elements Digital IC Bit-Sliced Datapath 6 Adder stage 1 Wiring Adder stage 2 Wiring Adder stage 3 Bit slice 0 Bit slice 2 Bit slice 1 Bit slice 63 Sum Select Shifter Multiplexers Loopback Bus From register files / Cache / Bypass To register files / Cache Loopback Bus Loopback Bus Digital IC Itanium Integer Datapath 7 Fetzer, Orton, ISSCC’02 Digital IC outline • Adder • Datapath functional unit • Comparators • Shifters • Multi-input Adders • Multipliers 8 Digital IC Introduction Adders Multitudes of contrivances were designed,and almost endless drawings made, for the purpose of economizing the time and simplifying the mechanism of carriage __charles babbage, on difference engine No.1,1864 9 Digital IC Outline • Single-bit Addition • Carry-Ripple Adder • Carry-Skip Adder • Carry-Lookahead Adder • Carry-Select Adder • Carry-Increment Adder • Tree Adder Slide 10 Digital IC The Binary Adder S A B C i   = A = BC i ABC i ABC i ABC i + + + C o AB BC i AC i + + = A B Cout Sum Cin Full adder Digital IC Full Adder Design I 12 A B B A C i C i A X V DD V DD A B C i B A B V DD A B C i C i A B A C i B C o V DD S Complimentary Static CMOS Full Adder 28 Transistors ) ( ) ( i o i i o C B A C ABC S C A B AB C        Digital IC Single-Bit Addition Half Adder Full Adder Slide 13 A B C out S 0 0 0 1 1 0 1 1 A B C C out S 0 0 0 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 1 1 0 1 1 1 A B S C out A B C S C out out S A B C A B    out ( , , ) S A B C C MAJ A B C     ) C , B , A ( MAJ = C ) B + A ( + B A = C ) B + A ( + AB = C C ⊕ P = C ⊕ B ⊕ A = ABC + C B A + C B A + C B A = S out Digital IC Single-Bit Addition Half Adder Full Adder Slide 14 A B C out S 0...
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This note was uploaded on 03/01/2012 for the course MR 310 taught by Professor Fuyuzhuo during the Spring '10 term at Shanghai Jiao Tong University.

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