Lab 3 - Wiring and Testing DiDo - Spr 10

Lab 3 - Wiring and Testing DiDo - Spr 10 - MFET 248...

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MFET 248, Lab 3 page 1 of 8 MFET 248 Laboratory Assignment #3 Spring 2010 Wiring and Testing Di/Do Objectives: The purpose of this assignment is to give you an opportunity to wire discrete inputs/discrete outputs (Di/Do) between typical devices found in a CIM environment. Specifically, you will wire: PLC outputs to robot inputs Robot outputs to PLC inputs A proximity switch to a robot input All inputs and outputs are 24 volts DC and all wiring will be implemented at the patch panel located at each drop line. Preparation: It is assumed that you have had a lecture on Di/Do interfacing. Refer to the following presentations as necessary: Working with Discrete I/O Discrete I/O Examples Phase 1 – Assign Addresses The required Di/Do connections between the PLC and the robot are shown in Figure 1 (see page 3). In this phase you will assign addresses to each input and output. With respect to the Adept robot , the first 8 inputs and 8 outputs are pre-wired from the JSIO port located on the back of the CIP (Controller Interface Panel) to the back of the patch panel. The Adept robot addresses are labeled on the patch panel and also documented in the presentation entitled Discrete I/O Examples. With respect to the ControlLogix PLC , the first 8 inputs and 8 outputs are pre-wired from the 1756- IB16I and 1756-OB16I DC input/output modules to the back of the patch panel. Refer to the presentation entitled Discrete I/O Examples for wiring details. In MFET 243 you developed a template PLC program which defined controller tags (and aliases) for local I/O, remote I/O (the pushbutton RediPANEL), and DeviceNet I/O. This program also included the DeviceNet overhead rungs. In phase 4 of this assignment you will create the alias tags shown in Table 1.
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MFET 248, Lab 3 page 2 of 8 Table 1 – ControlLogix Alias Tags to be Created in Phase 4 The following I/O point: Will be assigned the following alias name: 1756-OB16I output 0 O_new_data 1756-OB16I output 1 O_d0 1756-OB16I output 2 O_d1 1756-IB16I input 0 I_adept_ack 1756-IB16I input 1 I_adept_done 1756-OB16I output 3 O_done_ack 1756-IB16I input 2 I_adept_error 1756-IB16I input 3 I_error_line_1 1756-IB16I input 4 I_error_line_2 1756-OB16I output 4 O_error_ack Note the following: The 1756-IB16I module consists of 16 inputs (0 – 15)
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Lab 3 - Wiring and Testing DiDo - Spr 10 - MFET 248...

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