lect04-introsuperscalar - Pipelining to Superscalar Prof....

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ECE/CS 752: Advanced Computer Architecture I 1 Pipelining to Superscalar Prof. Mikko H. Lipasti University of Wisconsin Madison Lecture notes based on notes by John P. Shen Updated by Mikko Lipasti Pipelining to Superscalar Forecast – Limits of pipelining –The case for superscalar – Instruction level parallel machines – Superscalar pipeline organization – Superscalar pipeline design Limits of Pipelining IBM RISC Experience – Control and data dependences add 15% –Best case CPI of 1.15, IPC of 0.87 – Deeper pipelines (higher frequency) magnify dependence penalties This analysis assumes 100% cache hit rates –H it rates approach 100% for some programs –Many important programs have much worse hit rates –La te r ! Processor Performance Processor Performance = --------------- Time Program Instructions Cycles Time = X X In the 1980’s (decade of pipelining): –C P I : 5.0 => 1.15 In the 1990’s (decade of superscalar): P I : 1.15 => 0.5 (best case) In the 2000’s (decade of multicore): –M a r g i n a l CPI improvement Program Instruction Cycle (code size) (CPI) (cycle time) Amdahl’s Law No. of Processors N 1 h1 - h 1 - f f h = fraction of time in serial code f = fraction that is vectorizable v = speedup for f Overall speedup: Time v f f Speedup 1 1 Revisit Amdahl’s Law Sequential bottleneck Even if v is infinite –Per formance limited by nonvectorizable f v f f v 1 1 1 1 lim portion (1 f) No. of Processors N Time 1 - h 1 - f
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This note was uploaded on 03/02/2012 for the course ECE 752 taught by Professor Profgurisohi during the Spring '09 term at Wisconsin.

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lect04-introsuperscalar - Pipelining to Superscalar Prof....

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