lect04-introsuperscalar

lect04-introsuperscalar - Pipelining to Superscalar...

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Pipelining to Superscalar Pipelining to Superscalar Prof. Mikko H. Lipasti University of Wisconsin-Madison Lecture notes based on notes by John P. Shen Updated by Mikko Lipasti
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Pipelining to Superscalar Pipelining to Superscalar Forecast Limits of pipelining The case for superscalar Instruction-level parallel machines Superscalar pipeline organization Superscalar pipeline design
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Limits of Pipelining Limits of Pipelining IBM RISC Experience Control and data dependences add 15% Best case CPI of 1.15, IPC of 0.87 Deeper pipelines (higher frequency) magnify dependence penalties This analysis assumes 100% cache hit rates Hit rates approach 100% for some programs Many important programs have much worse hit rates Later!
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Processor Performance Processor Performance In the 1980’s (decade of pipelining): CPI: 5.0 => 1.15 In the 1990’s (decade of superscalar): CPI: 1.15 => 0.5 (best case) In the 2000’s (decade of multicore): Marginal CPI improvement Processor Performance = --------------- Time Program Instructions Cycles Program Instruction Time Cycle (code size) = X X (CPI) (cycle time)
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Amdahl’s Law Amdahl’s Law h = fraction of time in serial code f = fraction that is vectorizable v = speedup for f Overall speedup: No. of Processors N Time 1 h 1 - h 1 - f f v f f Speedup + - = 1 1
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Revisit Amdahl’s Law Revisit Amdahl’s Law
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This note was uploaded on 03/02/2012 for the course ECE 752 taught by Professor Profgurisohi during the Spring '09 term at University of Wisconsin.

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lect04-introsuperscalar - Pipelining to Superscalar...

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