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lect11-cache-replacement - Cache Replacement Policies...

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ECE/CS 752:Advanced Computer Architecture I 1 Cache Replacement Policies Prof. Mikko H. Lipasti University of Wisconsin Madison ECE/CS 752 Spring 2010 Cache Design: Four Key Issues These are: – Placement Where can a block of memory go? – Identification How do I find a block of memory? © 2005 Mikko Lipasti 2 Replacement How do I make space for new blocks? – Write Policy How do I propagate changes? Consider these for caches – Usually SRAM Also apply to main memory, disks Placement Memory Type Placement Comments Registers Anywhere; Int, FP, SPR Compiler/programmer manages © 2005 Mikko Lipasti 3 Cache (SRAM) Fixed in H/W Direct-mapped, set-associative, fully-associative DRAM Anywhere O/S manages Disk Anywhere O/S manages Placement Address Range – Exceeds cache capacity Map address to finite capacity SRAM Cache Hash Address Index Block Size © 2005 Mikko Lipasti 4 – Called a hash – Usually just masks high order bits Direct mapped – Block can only exist in one location – Hash collisions cause problems Data Out Index Offset 32-bit Address Offset Identification Fully associative – Block can exist anywhere – No more hash collisions Identification SRAM Cache Hash Address Hit Tag Check ?= Tag © 2005 Mikko Lipasti 5 – How do I know I have the right block? – Called a tag check Must store address tags Compare against address Expensive! – Tag & comparator per block Data Out Offset 32-bit Address Offset Tag Placement Set associative – Block can be in a locations H h lli i SRAM Cache Hash Address Index a Tags a Data Blocks Index © 2005 Mikko Lipasti 6 – Hash collisions: a still OK Identification – Still perform tag check – However, only a in parallel Data Out Offset Offset 32-bit Address Tag Index ?= ?= ?= ?= Tag
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