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Unformatted text preview: ECE/CS 752: Advanced Computer Architecture IECE/CS 752: Advanced Computer Architecture I 1 ECE/CS 752: Midterm 2 ECE/CS 752: Midterm 2 Review Review Instructor:Mikko H Lipasti Spring 2010 University of Wisconsin-Madison Midterm 2 Review Topics Midterm 2 Review Topics Advanced Memory Hierarchy (Lect 14) Advanced Microarchitecture (Lect 15) Multiple Threads Lec 16 Multiple Threads (Lect 16) Advanced Memory Hierarchy Advanced Memory Hierarchy • Coherent Memory Interface • Evaluation methods • Better miss rate: skewed associative caches, victim caches • Reducing miss costs through software restructuring • Higher bandwidth: Lock-up free caches, superscalar caches Beyond simple block • Beyond simple blocks • Two level caches • Prefetching, software prefetching • Main Memory, DRAM • Virtual Memory, TLBs • Interaction of caches, virtual memory Adv. Memory Adv. Memory - Readings Readings Read on your own: – Review: Shen & Lipasti Chapter 3 – W.-H. Wang, J.-L. Baer, and H. M. Levy. Organization of a two-level virtual-real cache hierarchy, Proc. 16th ISCA, pp. 140-148, June 1989 (B6) Online PDF – D. Kroft. Lockup-Free Instruction Fetch/Prefetch Cache Organization, – D....
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This note was uploaded on 03/02/2012 for the course ECE 752 taught by Professor Profgurisohi during the Spring '09 term at University of Wisconsin.
- Spring '09