143f2010-09-soln

143f2010-09-soln - EE143 Fall 2010 Homework Assignment#9...

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EE143 Fall 2010 Homework Assignment #9 Solutions * It is understood photoresist has to be removed prior to high-temperature processing steps. This is stated explicitly in the process flow only if the photoresist is used as an implantation mask. Problem 1 CROSS-SECTION ALONG A-A' CROSS-SECTION ALONG B-B' Step 4 p- substrate pad oxide Si3N4 p- substrate pad oxide Si3N4 Step 8 p p SiO2 SiO2 p- substrate pad oxide Si3N4 p p p- substrate pad oxide Si3N4 Step 21 p p SiO2 SiO2 p- substrate mask oxide n+ poly Si p p p- substrate mask oxide Step 27 CVD SiO2 p p SiO2 SiO2 Al p- substrate n+ n+ n+ poly Si p p CVD SiO2 p- substrate Step 32 CVD SiO2 p p SiO2 SiO2 Al p- substrate n+ n+ n+ poly Si p p CVD SiO2 p- substrate
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2 Problem 2 PROCESS DESCRIPTION CROSS-SECTION 1) Starting material p -substrate (lightly doped) 2) Thermal oxidation to grow pad oxide CVD Si 3 N 4 Pattern active device area (Mask #1) p -substrate (lightly doped) pad oxide Si3N4 photoresist 3) Channel stop implant (boron) Remove photoresist Thermal oxidation to grow field oxide p p p -substrate (lightly doped) SiO2 SiO2 pad oxide Si3N4 4) Strip Si 3 N 4 Strip pad oxide with HF dip Threshold implant (if necessary) Thermal oxidation to grow gate oxide CVD 1st level n+ poly-Si Pattern 1st level poly-Si (Mask #2) p p p -substrate (lightly doped) SiO2 SiO2 SiO2 5) Thermal oxidation of 1st level poly-Si CVD 2nd level n+ poly-Si Pattern 2nd levle poly-Si (Mask #3) p p p -substrate (lightly doped) SiO2 SiO2 SiO2 2nd poly photoresist 6) As implant through thin oxide to form self aligned n+ source Remove photoresist Post-implantation annealing p p p -substrate (lightly doped) n+ SiO2 SiO2 SiO2 2nd poly
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143f2010-09-soln - EE143 Fall 2010 Homework Assignment#9...

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