Lec_17 - Professor N Cheung U.C Berkeley Lecture 17 EE143...

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Professor N Cheung, U.C. Berkeley Lecture 17 EE143 F2010 Nonplanar Metallization Planar Metallization
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Professor N Cheung, U.C. Berkeley Lecture 17 EE143 F2010 Metal 1 (copper) Interlevel dielectric (ILD) Silicon Via (tungsten) Metal 3 (copper) Metal 5 (copper) Passivation Tungsten Plug to Si
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Professor N Cheung, U.C. Berkeley Lecture 17 EE143 F2010 “Caps” and “Plugs” The plug material can be same as interconnect material (e.g. Cu) or different material (e.g. W) oxide oxide
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Professor N Cheung, U.C. Berkeley Lecture 17 EE143 F2010 Non-Optimized Planarization example
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Professor N Cheung, U.C. Berkeley Lecture 17 EE143 F2010 Five Level Metallization for Company C W plugs for contacts and vias W for metal 1, Al/Ti metal 2,3, 4; Al metal 3 CMP for all dielectrics. Good Planarization Example
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Professor N Cheung, U.C. Berkeley Lecture 17 EE143 F2010 Benefits for Lithography Processes : • Lower Depth-of-Focus requirement • Reduced optical reflection effects on resist profiles • Reduced resist thickness variation over steps => Benefit for Etching Processes : • Reduced over-etch time required due to steps Benefit for Deposition Processes : • Improved step coverage for subsequent layer deposition topview Surface Planarization
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Professor N Cheung, U.C. Berkeley Lecture 17 EE143 F2010 = 1- (final step height/initial step height) Planarization Factor
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This note was uploaded on 03/03/2012 for the course EECS 142 taught by Professor Ee142 during the Spring '04 term at Berkeley.

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Lec_17 - Professor N Cheung U.C Berkeley Lecture 17 EE143...

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