Chapter 05c - MSP430 ISA - Instructions

Chapter 05c - MSP430 ISA - Instructions - MSP430...

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Unformatted text preview: MSP430 Instructions BYU CS/ECEn 124 Chapter 05c - MSP430 Instructions 2 Quiz 1. How many basic source addressing modes are defined by the MSP430 ISA? 2. When used in combination with registers R0- R3, how many additional source addressing modes are defined by the MSP430 ISA? 3. How many basic destination addressing modes are defined by the MSP430 ISA? 4. When used in combination with registers R0- R3, how many additional destination addressing modes are defined by the MSP430 ISA? Quiz BYU CS/ECEn 124 Chapter 05c - MSP430 Instructions 3 Examples Review Source Destination Example Rn x(Rn) Sym &abs @Rn @Rn+ #n Rn x(Rn) Sym &abs Len Operation mov r10,r11 1 r10 r11 mov 2(r5),6(r6) 3 M(2+r5) M(6+r6) mov EDE,TONI 3 M(EDE) M(TONI) mov &MEM,&TCDAT 3 M(MEM) M(TCDAT) mov @r10,r11 1 M(r10) r11 mov @r10+,tab(r6) 2 M(r10) M(tab+r6) , r10+2 r10 mov #45,TONI 3 #45 M(TONI) mov #2,&MEM C 2 #2 M(MEM) mov #1,r11 C 1 #1 r11 mov #45,r11 2 #45 r11 BYU CS/ECEn 124 Chapter 05c - MSP430 Instructions 4 Data Instructions 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 4-bit Op-code S-Reg Ad b/w As D-Reg Mnemonic Op-code V N Z C Operation Description MOV 1 src dst Move source to destination CMP 1 1 dst-src Compare source to destination Status Register: = bit affected, = bit not affected, 0 = cleared, 1 = set, z = same as Z Double Operand Instructions The MOV instruction replaces the destination operand with a copy the source operand. NOTE: The status register is not affected by this instruction The CMP instruction internally subtracts the source operand from the destination operand, updates the status register bits, and then discards the results of the subtraction. BYU CS/ECEn 124 Chapter 05c - MSP430 Instructions 5 Arithmetic Instructions 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 4-bit Op-code S-Reg Ad b/w As D-Reg Mnemonic Op-code V N Z C Operation Description ADD 1 1 src+dst dst Add source to destination ADDC 1 1 src+dst+C dst Add src and C to dst SUBC 1 1 1 dst+.not.src+C dst Subtract src and not C from dst SUB 1 dst+.not.src+1 dst Subtract source from destination DADD 1 1 src+dst+C dst(dec) Decimal add src and C to dst Status Register: = bit affected, = bit not affected, 0 = cleared, 1 = set, z = same as Z Double Operand Instructions The ADD, ADDC, SUBC, SUB, and DADD instructions replaces the destination operand with the results of the source operand operating on the destination operand. The V, N, Z, and C bits in the status register are set/reset depending upon the result of the operation. BYU CS/ECEn 124 Chapter 05c - MSP430 Instructions 6 Logical Instructions 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 4-bit Op-code S-Reg Ad b/w As D-Reg Mnemonic Op-code V N Z C Operation Description BIT 1 1 1 z src.and.dstsrc....
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Chapter 05c - MSP430 ISA - Instructions - MSP430...

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