homework2 - than 3 inputs and the OR gates should have no...

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ECE 190 Homework 2 Spring 2011 Complete all parts of the following problems from the textbook: 3.6, 3.14, 3.16, 3.24, 3.28, 3.30, 3.34, 3.43, 3.44 Be sure to check the errata page at http://highered.mcgraw-hill.com/sites/0072467509/information_center_view0/errata_page.html due to errors in the first print. In addition, solve the following problem: 1. Implement one-bit full adder circuit using AND, OR, and NOT gates. The AND gates should have no more
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Unformatted text preview: than 3 inputs and the OR gates should have no more than 4 inputs. The one-bit full adder should accept two one-bit inputs and carry-in and should produce one-bit sum and carry-out. This homework is due on Thursday February 17 at 5pm promptly. It should be deposited in the ECE 190 dropbox in Everitt Lab. We will post solutions sometime thereafter, so late homeworks will not be accepted. No exceptions to this rule will be given....
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This note was uploaded on 03/08/2012 for the course ECE 190 taught by Professor Hutchinson during the Spring '08 term at University of Illinois, Urbana Champaign.

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