EEL6323-S11-HLec011-Power-dissipation-2spp

EEL6323-S11-HLec011-Power-dissipation-2spp - 1 Lecture 11:...

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Unformatted text preview: 1 Lecture 11: Power Dissipation Low Power Design Throughput oriented design Clock gating Leakage reduction techniques Multi-processing trends Types of Processing Fixed-rate Processing (i.e. Signal processing for multimedia or communications) Stream based computation No advantage in obtaining throughput in excess of the real-time constraint Variable-rate or burst-mode computation (i.e. general purpose computation) Mostly idle (or low load) with bursts of computation Faster is better 2 Common Design Approach: Fixed VDD Compute intensive:-video decompression-speech processing-matlab Low speed/long latency-text entry-playing music-address browsing Idle Dynamic Voltage Scaling (DVS) Reduce VDD Decrease frequency 3 Dynamic Power Reduction Through Software Hardware Cooperation Processor: Converter Loop sets V DD , f clk f 1MHz <<f clk accumulator Ring oscillator matched to critical path of processor 4 System Performance and Energy Power Dissipation in CMOS VLSI Power dissipation of Multimedia VLSI Power breakdown Clock Logic Memory I/O Micro Processing Unit (MPU) Application-Specific Standard Product (ASSP) [Sakurai, 1997] 5 Clock Distribution In P, roughly 40% of total power dissipated in clock distribution Processors have variable throughput Many blocks are idle Pentium 4 Clocking Scheme Clock Gating Requires careful skew control 6 Leakage Reduction Techniques Impact of Process Variations Significant variation in performance and leakage...
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This note was uploaded on 03/02/2012 for the course ESI 6323 taught by Professor Guan during the Spring '09 term at University of Florida.

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EEL6323-S11-HLec011-Power-dissipation-2spp - 1 Lecture 11:...

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