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Unformatted text preview: ECE 553: Testing and Testable Design of Digital Systems Department of Electrical and Computer Engineering University of Wisconsin–Madison ECE 553 : Testing and Testable Design of Digital Systems Fall 2011 Assignment #2 Date Tuesday, September 27, 2011 Due date Thursday, October 6, 2011 1. (10 points) Compute the total number of stuck-at (single and multiple) faults for a logic in figure 1. For the circuit of Figure 1, we have Number of fault sites = PIs + gates + fanout branches = 15 Therefore, Number of single faults = 15 × 2 = 30 Number of single and multiple faults = 3 number of fault sites- 1 = 3 15- 1 = 14348906 The circuit has 14348906 single and multiple stuck-at faults. Total number of transistors = 6 × 2 + 4 × 3 + 2 = 26 2. (Bushnell and Agrawal) Problem 4.5 (a) A two-input NAND gate is shown in the above figure. The following table gives tests for transistor stuck-open (sop) faults: Test No. Fault Test: Vector 1, Vector 2 1 P1 sop 11, 01 2 P2 sop 11, 10 3 N1 sop 01, 11 or 10, 11 or 00, 11 4 N2 sop 01, 11 or 10, 11 or 00, 11 1 Fall 2011 (Lec: Saluja, TA: Millican) ECE 553: Testing and Testable Design of Digital Systems Ground DD V N2 N1 P2 Circuit for Problem 4.5. CMOS NAND gate. A B C P1 Logic NAND gate. A B C Notice that the sop faults of N1 and N2 have exactly the same tests. These two faults are equivalent. Equivalence of transistor faults is discussed in the following paper: M.-L Flottes, C. Landrault and S. Provossoudovitch, “Fault Modeling and Fault Equiv- alence in CMOS Technology,” J. Electronic Testing: Theory and Applications , vol. 2, pp. 229-241, August 1991. (b) The following sequence of four vectors contains one vector pair for each fault in the above table: 11 , 01 , 11 , 10 Notice that this sequence also detects all single stuck-at faults in the logic model of the NAND gate. (c) A stuck-at fault in a signal affects two transistors in the two-input NAND gate. For example, the fault A s-a-1 will mean that N1 remains permanently shorted (N1-ssh) and P1 remains permanently open (P1-sop). The following table gives all equivalences: Stuck-at fault Equivalent transistor faults A s-a-1 N1-ssh and P1-sop B s-a-1 N1-ssh and P2-sop C s-a-1 (P1-ssh or P2-ssh) and (N1-sop or N2-sop) A s-a-0 N1-sop and P1-ssh B s-a-0 N2-sop and P2-ssh C s-a-0 N1-ssh, N2-ssh, P1-sop and P2-sop Notice that the three equivalent faults, A s-a-0, B s-a-0 and C s-a-0, are actually caused by different faulty transistors. They are detected by the same test (11)....
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- Winter '08
- Logic gate, faults, Testable Design of Digital Systems, Testable Design