hw3sol (1)

hw3sol (1) - ECE 553 Testing and Testable Design of Digital...

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Unformatted text preview: ECE 553: Testing and Testable Design of Digital Systems Department of Electrical and Computer Engineering University of Wisconsin–Madison ECE 553 : Testing and Testable Design of Digital Systems Fall 2011 Assignment #3 Solution 1. For the circuit shown in the Figure 1, perform Parallel pattern single fault simulation targeting the fault h stuck-at-1. You are given 4 vectors to simulate and the vectors are encoded as 11 for 1, 00 for 0 and 01 for X. Figure 1: Parallel pattern single fault simulation From the figure,we can see that vectors 1 and 2 produce a different output from the fault free circuit at the output and hence the fault is detectable under the two vectors. However vector 3 fails to distinguish between the faulty and fault-free ciruits at the PO and hence the fault is undetectable under vector 3. Vector 4 is a special case in that it produces an X at the primary output and hence the fault is said to be potentially detectable under vector 4. 1 Fall 2011 (Lec: Saluja, TA: Millican) ECE 553: Testing and Testable Design of Digital Systems 2. For the circuit in Figure 2, which is the same circuit as problem 1, perform parallel fault simulation for the vector abc = 110 and three faults: d stuck-at-0, h stuck-at-0 and n stuck-at-1 to determine which faults will be detected at the primary output. Figure 2: Parallel fault simulation From the figure, e sa1 and h sa1 are detectable by the input, but nsa1 is not. 3. For the same circuit shown in figure 1, perform deductive fault simulation to determine what faults will be detected at the primary output h for the test vector a=1 b=0 c=1. Solution: L a = { a/ } L b = { b/ 1 } L c = { c/ } L d = { b/ 1 , d/ 1 } L e = { b/ 1 , e/ 1 } L f = L d ∩ L a ∪ L f = { b/ 1 , d/ 1 , f/ 1 } L g = L e ∩ L c ∪ L g = { b/ 1 , e/ 1 , g/ } L h = L f ∪ L h = { b/ 1 , d/ 1 , f/ 1 , h/ 1 } L i = L f ∪ L i = { b/ 1 , d/ 1 , f/ 1 , i/ 1 } L j = L g ∪ L j = { b/ 1 , e/ 1 , g/ , j/ } L k = L g ∪ L k = { b/ 1 , e/ 1 , g/ , k/ } L m = L h ∩ L j ∪ L m = { d/ 1 , f/ 1 , h/ 1 , m/ } 2 Fall 2011 (Lec: Saluja, TA: Millican) ECE 553: Testing and Testable Design of Digital Systems...
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hw3sol (1) - ECE 553 Testing and Testable Design of Digital...

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