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Lecture_5 - Overview Motivation Fault Modeling ECE 553...

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9/13/2011 1 ECE 553: TESTING AND TESTABLE DESIGN OF DIGITAL SYSTES Fault Modeling 9/13/2011 2 Overview Motivation Fault Modeling Why model faults? Some real defects in VLSI and PCB Common fault models Stuck-at faults Transistor faults Summary 9/13/2011 3 Motivation Models are often easier to work with Models are portable Models can be used for simulation, thus avoiding expensive hardware/actual circuit implementation Nearly all engineering systems are studied using models All the above apply for logic as well as for fault modeling 9/13/2011 4 Why Model Faults? I/O function tests inadequate for manufacturing (functionality versus component and interconnect testing) Real defects (often mechanical) too numerous and often not analyzable A fault model identifies targets for testing A fault model makes analysis possible Effectiveness measurable by experiments 9/13/2011 5 Some Real Defects in Chips Processing defects Missing contact windows Parasitic transistors Oxide breakdown . . . Material defects Bulk defects (cracks, crystal imperfections) Surface impurities (ion migration) . . . Time-dependent failures Dielectric breakdown Electromigration NBTI (negative bias temperature instability) . . . Packaging failures Contact degradation Seal leaks . . . Ref.: M. J. Howes and D. V. Morgan, Reliability and Degradation - Semiconductor Devices and Circuits, Wiley, 1981. + more recent defect types 9/13/2011 6 Common Fault Models Single stuck-at faults Transistor open and short faults Memory faults PLA faults (stuck-at, cross-point, bridging) Functional faults (processors) Delay faults (transition, path) Analog faults For more examples, see Section 4.4 (p. 60-70) of
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