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Unformatted text preview: 9/27/2011 1 ECE 553: TESTING AND TESTABLE DESIGN OF DIGITAL SYSTES Combinational ATPG Basics 9/27/2011 2 Overview Structural vs. functional test Definitions Completeness Conditions for finding a test Algebras Types of Algorithms classical Complexity Summary Appendices 9/27/2011 3 Functional vs. Structural ATPG 9/27/2011 4 Carry Circuit 9/27/2011 5 Functional vs. Structural (Contd.) Functional ATPG generate complete set of tests for circuit input-output combinations 129 inputs, 65 outputs: 2 129 = 680,564,733,841,876,926,926,749, 214,863,536,422,912 patterns Using 1 GHz ATE, would take 2.15 x 10 22 years Structural test: No redundant adder hardware, 64 bit slices Each with 27 faults (using fault equivalence) At most 64 x 27 = 1728 faults (tests) Takes 0.000001728 s on 1 GHz ATE Designer gives small set of functional tests augment with structural tests to boost coverage to 98 + % 9/27/2011 6 Definition of Automatic Test- Pattern Generator Operations on digital hardware: Inject fault into circuit modeled in computer Use various ways to activate and propagate fault effect through hardware to circuit output Output flips from expected to faulty signal Electron-beam ( E-beam ) test observes internal signals picture of nodes charged to 0 and 1 in different colors Too expensive Scan design add test hardware to all flip-flops to make them a shift register in test mode Can shift state in, scan state out Widely used makes sequential test combinational Costs: 5 to 20% chip area, circuit delay, extra pin, longer test sequence 9/27/2011 2 9/27/2011 7 Algorithm Completeness Definition: Algorithm is c omplete if it ultimately can search entire binary (decision) space, as needed, to generate a test Untestable fault or Undetectable fault no test for it even after entire space is searched Combinational circuits only untestable faults are redundant, showing the presence of unnecessary hardware 9/27/2011 8 Notation Symbol D D 0 1 X G0 G1 F0 F1 Meaning 1/0 0/1 0/0 1/1 X/X 0/X...
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