Lecture_14

Lecture_14 - 11/1/2011 1 ECE 553: TESTING AND TESTABLE...

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Unformatted text preview: 11/1/2011 1 ECE 553: TESTING AND TESTABLE DESIGN OF DIGITAL SYSTES Memory testing 11/1/2011 2 Overview Motivation and introduction Functional model of a memory A simple minded test and its limitations Fault models March tests and their capabilities Neighborhood tests Summary 11/1/2011 3 Memory Cells Per Chip 2010: We have many Gigabit memories in place and we are now moving into Terabit region. 11/1/2011 4 Test Time in Seconds (Memory Size n Bits ) n 1 Mb 4 Mb 16 Mb 64 Mb 256 Mb 1 Gb 2 Gb n 0.06 0.25 1.01 4.03 16.11 64.43 128.9 n X log 2 n 1.26 5.54 24.16 104.7 451.0 1932.8 3994.4 n 3/2 64.5 515.4 1.2 hr 9.2 hr 73.3 hr 586.4 hr 1658.6 hr n 2 18.3 hr 293.2 hr 4691.3 hr 75060.0 hr 1200959.9 hr 19215358.4 hr 76861433.7 hr Size Number of Test Algorithm Operations Memory cycle time = 60ns 11/1/2011 5 Memory Test Levels Chip, Array, & Board 11/1/2011 6 Functional Model 11/1/2011 2 11/1/2011 7 Simplified Functional Model 11/1/2011 8 A simple minded test for cell := 0 to n - 1 (or any other order) do write 0 to A [cell]; read A [cell]; { Expected value = 0} write 1 to A [cell]; read A [cell]; { Expected value = 1 } end for; What does this test achieve? What kind of faults does it detect and it fault coverage? 11/1/2011 9 Functional Faults Fault SAF SAF SAF SAF SAF SAF CF CF AF AF AF AF AF AF TF NPSF a b c d e f g h i j k l m n o p Functional fault Cell stuck Driver stuck Read/write line stuck Chip-select line stuck Data line stuck Open circuit in data line Short circuit between data lines Crosstalk between data lines Address line stuck Open circuit in address line Shorts between address lines Open circuit in decoder Wrong address access Multiple simultaneous address access Cell can be set to 0 (1) but not to 1 (0) Pattern sensitive cell interaction 11/1/2011 10 Reduced Functional Faults SAF TF CF NPSF Fault Stuck-at fault Transition fault Coupling fault Neighborhood Pattern Sensitive fault 11/1/2011 11 Stuck-at Faults Condition : For each cell, must read a 0 and a 1. 11/1/2011 12 Transition Faults Cell fails to make 0 1 or 1 0 transition Condition : Each cell must undergo a transition and a transition, and be read after such, before undergoing any further transitions. < /0> transition fault 11/1/2011 3 11/1/2011 13 Coupling Faults Coupling Fault (CF): Transition in bit j causes unwanted change in bit i 2-Coupling Fault : Involves 2 cells, special case of k- Coupling Fault Must restrict k cells to make practical Inversion and Idempotent CFs -- special cases of 2- Coupling Faults Bridging and State Coupling Faults involve any # of cells, caused by logic level Dynamic Coupling Fault (CFdyn) -- Read or write on j forces i to 0 or 1 11/1/2011 14 March Test Notation r0 -- Read a 0 from a memory location r1 -- Read a 1 from a memory location w0 -- Write a 0 to a memory location w1 -- Write a 1 to a memory location -- Write a 1 to a cell containing 0 -- Write a 0 to a cell containing 1...
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Lecture_14 - 11/1/2011 1 ECE 553: TESTING AND TESTABLE...

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