Lecture_19

Lecture_19 - 12/6/2011 Overview: Logic BIST ECE 553:...

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12/6/2011 1 ECE 553: TESTING AND TESTABLE DESIGN OF DIGITAL SYSTEMS Built-In Self-Test (BIST) - 2 12/6/2011 2 Overview: Logic BIST Motivation Built-in Logic Block Observer (BILBO) Test / clock systems Test / scan systems Circular self-test path (CSTP) BIST Circuit initialization Test point insertion Summary 12/6/2011 3 Motivation Complex systems with multiple chips demand elaborate logic BIST architectures BILBO and test / clock system Shorter test length, more BIST hardware STUMPS & test / scan systems Longer test length, less BIST hardware Circular Self-Test Path Lowest hardware, lower fault coverage Benefits: cheaper system test, Cost: more hardware. Must modify fully synthesized circuit for BIST to boost fault coverage Initialization, test point hardware 12/6/2011 4 Built-in Logic Block Observer (BILBO) Combined functionality of D flip-flop, pattern generator , response compacter , & scan chain Reset all FFs to 0 by scanning in zeros 12/6/2011 5 Example BILBO Usage SI Scan In SO Scan Out Characteristic polynomial : 1 + x + … + x n CUTs A and C: BILBO1 is MISR, BILBO2 is LFSR CUT B: BILBO1 is LFSR, BILBO2 is MISR 12/6/2011 6 BILBO Serial Scan Mode B 1 B 2 = “00” Dark lines show enabled data paths
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12/6/2011 2 12/6/2011 7 BILBO LFSR Pattern Generator Mode B 1 B 2 = “01” 12/6/2011 8 BILBO in D FF (Normal) Mode B 1 B 2 = “10” 12/6/2011 9 BILBO in MISR Mode B 1 B
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Lecture_19 - 12/6/2011 Overview: Logic BIST ECE 553:...

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