isa - Two Key Principles of Machine Design ECEN 4593...

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon
ECEN 4593 1 ECEN 4593 Computer Organization Instruction Sets (A look at the MIPS ISA) ECEN 4593 Andrew Pleszkun Mainly taken from notes prepared by Prof. Mary Jane Irwin - PSU Two Key Principles of Machine Design 1. Instructions are represented as numbers and, as such, are indistinguishable from data 2. Programs are stored in alterable memory (that can be read or written to) just like data Stored program concept Accounting prg (machine code) Memory Stored-program concept Programs can be shipped as files of binary numbers – binary compatibility Computers can inherit ready-made software provided they are compatible with an existing ISA – leads industry to align around a small number of ISAs C compiler (machine code) Payroll data Source code in C for Acct prg MIPS-32 ISA Instruction Categories Computational Load/Store Jump and Branch Floating Point coprocessor Memory Managemen R0 - R31 PC H Registers Memory Management Special HI LO op op op rs rt rd sa funct rs rt immediate jump target 3 Instruction Formats: all 32 bits wide R format I format J format MIPS (RISC) Design Principles Simplicity favors regularity fixed size instructions small number of instruction formats opcode always the first 6 bits Smaller is faster limited instruction set limited number of registers in register file limited number of addressing modes Make the common case fast arithmetic operands from the register file (load-store machine) allow instructions to contain immediate operands Good design demands good compromises three instruction formats MIPS Arithmetic Instructions MIPS assembly language arithmetic statement add $t0, $s1, $s2 sub $t0, $s1, $s2 Each arithmetic instruction performs one operation Each specifies exactly three operands that are all contained in the datapath’s register file ( $t0,$s1,$s2 ) destination source1 op source2 Instruction Format ( R format) 0 17 18 8 0 0x22 MIPS fields are given names to make them easier to refer to MIPS Instruction Fields op rs rt rd shamt funct op 6-bits op code that specifies the operation rs 5-bits r egister file address of the first s ource operand rt 5-bits r egister file address of the second source operand rd 5-bits r egister file address of the result’s d estination shamt 5-bits sh ift am oun t (for shift instructions) funct 6-bits funct ion code augmenting the opcode
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
ECEN 4593 2 MIPS Register File Register File src1 addr src2 addr dst addr write data 32 bits src1 data src2 data 32 locations 32 5 32 5 5 32 Holds thirty-two 32-bit registers Two read ports and One write port Registers are Faster than main memory - But register files with more locations are slower (e.g., a 64 word file could be as much as 50% slower than a 32 word file) - Read/write port increase impacts speed quadratically Easier for a compiler to use - e.g., (A*B) – (C*D) – (E*F) can do multiplies in any order vs.
Background image of page 2
Image of page 3
This is the end of the preview. Sign up to access the rest of the document.

This note was uploaded on 03/15/2012 for the course ECEN 4593 taught by Professor Staff during the Spring '08 term at Colorado.

Page1 / 8

isa - Two Key Principles of Machine Design ECEN 4593...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online