SampleTest1A-101SOLN

SampleTest1A-101SOLN - NAME: Student Number: 5 pages 1 CMPT...

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NAME: Student Number: 1 5 pages CMPT 250: Sample Test 1(A ) 30 marks Answer all questions on the test paper. Use the backs of the pages for rough work, if necessary. Be sure your name and student number are on all pages. A VHDL summary sheet, which may be detached from this exam, is provided. CAUTION: In accordance with SFU’s Academic Honesty Policy (S10.01), academic dishon- esty in any form will not be tolerated. 1. The following state machine diagram provides the functional specification for an asynchronous (i.e., no clock input) sequential digital system: q1*q0 S0 S1 S2 S3 x + y x*y x + y x*y x + y q1*q0 q1 q1 (a) Provide an entity definition for the system in two ways.: i. As a “black-box” diagram. (2 marks) q1 x y q0 ii. As a VHDL entity definition. (2 marks) entity Device is port(x, y: in std_logic; q0, q1 : out std_logic); end Device;
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NAME: Student Number: 2 (b) In VHDL provide a functional specification for this device, assuming the entity definition you provided in answer to question 1.a.ii. Your functional specification should consist of two pro- cesses - one defining the output function and one defining the state transition function. (10
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This note was uploaded on 03/16/2012 for the course ENSC 802 taught by Professor Ivanbaijic during the Spring '12 term at Simon Fraser.

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SampleTest1A-101SOLN - NAME: Student Number: 5 pages 1 CMPT...

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