FinalExamFall09 - EEL 4712 Digital Design Final Exam Fall...

Info iconThis preview shows pages 1–3. Sign up to view the full content.

View Full Document Right Arrow Icon
EEL 4712 – Digital Design Final Exam – Fall Semester 2009 Name ___________________________________ 1 IMPORTANT: Please be neat and write (or draw) carefully. If we cannot read it with a reasonable effort, it is assumed wrong. Small8-related problem : Shown below is a modified architecture of the Small8 computer. Assume that all the components are the same as you had them in your mini-project with the following exceptions: The outputs of AR, PC, SP, and IX are connected to the External Address Bus through a set of 4-to-1 MUX‟s. The RAM is a 64K X 8 asynchronous RAM. The timing requirements of its read and write operations are given in the timing diagram on the next page. There is a flag register called tempC (temporary carry), with synchronous LD and CLR . Registers Temp1 and Temp2 are connected as shown, both with synchronous LD and synchronous CLEAR inputs. 8 Temp1 A D ALU A.OE D.OE ALU.OE Cout C tempC CFlag CSEL C 0 1 tempC Cin CS1 CS0 (To Controller) 00 01 10 11 0 1 T1.OE Temp1 T1.OE MUX selects the input to the Cin of the ALU ff ff MUX selects which carry goes to the controller X Y F Synchronous LD : all registers and flipflops Synchronous CLR : IX, Temp1, Temp2, tempC OE (output enable): ARH, ARL, PCH, PCL, IXH, IXL INC (increments the 16-bit register by 1): PC, SP. DEC (decrements the 16-bit SP register by 1): SP. Also, there is a 3-bit counter with synchronous CLR and EN ExData[7. .0] (External Data Bus) ExAD[15. .0] (External Address Bus) Internal Bus ARH ARL AR SPH SPL SP AD[15. .0] Din[7. .0] Dout[7. .0] MemEN MemOE MemWE 64K X 8 Asynch RAM LDen STen AR PC SP IX 00 01 10 11 AS1 AS0 4-to-1 MUX’s PCH PCL PC IXH IXL IX 8 8 8 8 16 16 16 16 16 COUNTER CLR EN CT=7 (See next page for ALU functions) Temp2 8
Background image of page 1

Info iconThis preview has intentionally blurred sections. Sign up to view the full version.

View Full DocumentRight Arrow Icon
EEL 4712 – Digital Design Final Exam – Fall Semester 2009 Name ___________________________________ 2 * The Cin for subtraction is the borrow input. 1. You are to implement the following two instructions for the Small8 computer by completing the ASM chart on the next page: SEL Functions 000 Zero (F = 0) 001 Add with carry (F = X + Y + Cin) 010 Subtract (X-Y) with borrow (F = X + /Y + Cin)* 011 Shift right (F = X >> 1), Cin>>F7, F0>>Cout 100 Shift left (F = X << 1), F0<<Cin, Cout<<F7 101 Bit-wise XOR (F = X XOR Y) 110 Bit-wise AND (F = X AND Y) 111 Bit-wise OR (F = X OR Y) CLK ExAD Din Dout MemEN MemOE MemWE 0101 0102 0103 0104 0105 ZZ indata ZZ ZZ outdata ZZ Read outdata Write indata from loc. 0101 to loc. 0104 Timing requirements for the read and write operations of the asynchronous RAM: Description INCA (FA) A <= (A) + 1; Increment Register A.
Background image of page 2
Image of page 3
This is the end of the preview. Sign up to access the rest of the document.

This document was uploaded on 03/05/2012.

Page1 / 11

FinalExamFall09 - EEL 4712 Digital Design Final Exam Fall...

This preview shows document pages 1 - 3. Sign up to view the full document.

View Full Document Right Arrow Icon
Ask a homework question - tutors are online