Small8LabsFall11 - Small8 Computer Labs EL 4712 Fall 2011...

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Small8 Computer Labs EL 4712 – Fall 2011 1 Objective: The objective of this “mini-project” is to design, simulate, and implement a very simple computer, called Small8. Small8 consists of an 8-bit processor (with a 64K address space), a RAM, and I/O ports. Other related files: (available on the EEL4712 Web site) Small8InstructionSetPage1.pdf and Small8InstructionsAddendum.pdf TestPackage.zip: contains a set of test programs and programs required to assemble an assembly source code program into a .mif file. TestCase1.asm, TestCase1.mif – source code and .mif file to test LDAA, STAA, STAR, ANDR, ADCR, BEQA. TestCase2.asm, TestCase2.mif – source code and .mif to test LDAI, CLRC, RORC, DECA, BNE. TestCase3.asm – source code to test index addressing. You have to obtain the .mif file yourself. mult.asm, mult.mif – a comprehensive test program (multiplication) in source code and .mif file. Logistics: As discussed in class, this is essentially a “mini-project”. It will be worth 800 points, 4 times a regular lab (Since a lab is worth 200 points). The grading is based on the completion of a list of “deliverables”. When completed, each deliverable will earn the student some amount of points (toward the 800 total points). The list of deliverables, their due dates, and their worth in points will be described later. General architecture for the Small8 computer: The Small8 computer has: An 8-bit processor (CPU) with 8-bit data registers and data bus and a 64K address space (16-bit address bus). A memory module An input port and an output port (similar to those implemented in Lab 7), with the following addresses: INPORT0 $FFFE INPORT1 $FFFF e.g., LDAA $FFFE means A (INPORT0) OUTPORT0 $FFFE OUTPORT1 $FFFF e.g., STAA $FFFE means OUTPORT0 (A) Figure 1. Overall architecture of the Small8 computer.
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Small8 Computer Labs EL 4712 – Fall 2011 2 General architecture for the Small8 CPU: The Small8 CPU is an 8-bit processor consisting of: A set of components comprising the “Internal Architecture”: An ALU (arithmetic/logic unit) with the associated Status Register of four flags (carry C, overflow V, sign S, and zero Z). Two general-purpose registers: Accumulator (A) and Data (D) which are viewed by the programmer as ”persistent” and should only change if an instruction specifically changes them. Some special-purpose registers, including Index Register (X), Program Counter (PC), Address Register (AR), Instruction Register (IR), and Stack Pointer (SP). A Controller which controls both the components of the Internal Architecture and the external
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Small8LabsFall11 - Small8 Computer Labs EL 4712 Fall 2011...

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