Lab6.315 - corresponding to your design. 2. Build up the...

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EECE-315 Prelab 6 In this lab, you will be verifying the BJT bias design that you did in homework problem. 1. Check back to homework problems and record the values of all components used in the bias circuit, including the supply voltage. 2. Also record the Pspice values of the worst-case maximum and minimum I CQ . 3. For your design, what are the voltage and current intercepts of the load lines?
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EECE-315 Lab 6 1. Use a curve tracer to find the DC beta of your 2N3904 transistor at the designed Q- point. Print a hard copy. Add the load line to the curve tracer plot and show the Q-point
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Unformatted text preview: corresponding to your design. 2. Build up the bias circuit that you designed. Use the measured DC beta, and measured resistances to calculate the theoretical I CQ and V CEQ . 3. Measure I CQ and V CEQ . 4. Perform the following three cases. R 1 R 2 R E Measured I CQ Case I Nominal Nominal 5% higher (using a decade resistance box) Case II Nominal 5% higher (using a decade resistance box) Nominal Case III 5% higher (using a decade resistance box) Nominal Nominal 5. Discuss your results....
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This note was uploaded on 03/11/2012 for the course ECE 185 taught by Professor Ma during the Spring '12 term at CSU Chico.

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Lab6.315 - corresponding to your design. 2. Build up the...

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